S. Behari

CDF run IIb silicon detector: electrical performance and deadtime-less operation

The main building block and readout unit of the planned CDF Run IIb silicon detector is a stave, a highly integrated mechanical, thermal, and electrical structure. One of its characteristic features is a copper-on-Kapton flexible cable for power, high voltage, data transmission, and control signals that is placed directly below the silicon microstrip sensors. The dense packaging makes deadtime-less operation of the stave a challenge since coupling of bus cable activity into the silicon sensors must be suppressed efficiently. The stave design features relevant for deadtime-less operation are discussed. The electrical performance achieved with stave prototypes is presented.

Polyimide and BeO mini port card performance comparison for CDF run IIb

The new silicon detector design for CDF relies on advanced packaging solutions in order to attain the strict small size and low mass requirements dictated by the experiments physics program. The silicon strip detector at CDF is composed of overlaying silicon sensors in the form of a barrel around the colliding beam. The electronic instrumentation (sensors, readout, and transceiver chips) is assembled into the staves of this barrel. In this paper we describe the development of the mini port card (MPC). The MPC is located at one of the ends of the stave, and it is responsible for signal translation and repetition from the readout chips to and from the data acquisition system (DAQ). The MPCs development has taken two approaches that use different technologies. One of the approaches uses BeO as the board substrate (BeO-MPC), while the other approach uses a hybrid rigid-flexible polyimide substrate (Poly-MPC). We present test results of pre-production parts, each one assembled with a different MPC packaging technology. Complete thermal and electrical characterization of the MPC is shown, and the advantages and disadvantages of both technologies, as well as their influence in the overall system performance, are presented.

CDF run IIb silicon detector: the innermost layer

The innermost layer (L00) of the Run IIa silicon detector of CDF was planned to be replaced for the high luminosity Tevatron upgrade of Run IIb. This new silicon layer (L0) is designed to be a radiation tolerant replacement for the otherwise very similar L00 from Run IIa. The data are read out via long, fine-pitch, low-mass cables allowing the hybrids with the chips to sit at higher z(/spl sim/70 cm), outside of the tracking volume. The design and first results from the prototyping phase are presented. Special focus is placed on the amount and the structure of induced noise as well as signal-to-noise values.

CDF run IIb silicon: design and testing

The various generations of Silicon Vertex Detectors (SVX, SVX, SVXII) for Collider Detector at Fermilab (CDF) at the Fermilab Tevatron have been fundamental tools for heavy-flavor tagging via secondary vertex detection. The CDF Run IIb Silicon Vertex Detector (SVXIIb) has been designed to be a radiation-tolerant replacement for the currently installed SVXII because SVXII was not expected to survive the Tevatron luminosity anticipated for Run IIb. One major change in the new design is the use of a single mechanical and electrical element throughout the array. This element, called a stave, carries six single-sided silicon sensors on each side and is built using carbon fiber skins with a high thermal conductivity on a foam core with a built-in cooling channel. A Kapton bus cable carries power, data and control signals underneath the silicon sensors on each side of the stave. Sensors are read out in pairs via a ceramic hybrid glued on one of the sensors and equipped with four SVX4 readout chips. This new design concept leads to a very compact mechanical and electrical unit, allowing streamlined production and ease of testing and installation. A description of the design and mechanical performance of the stave is given. Results on the electrical performance obtained using prototype staves are also presented.

CDF run IIb silicon vertex detector DAQ upgrade

The Collider Detector at Fermilab (CDF) operates in the beamline of the Tevatron proton-antiproton collider at Batavia, IL. The Tevatron is expected to undergo luminosity upgrades (Run IIb) in the future, resulting in a higher number of interactions per beam crossing. To operate in this dense radiation environment, an upgrade of the CDFs silicon vertex detector subsystem and a corresponding upgrade of its VME-based DAQ system has been explored. Prototypes of all the Run IIb SVX DAQ components have been constructed, assembled into a test stand, and operated successfully using an adapted version of the CDFs network-capable DAQ software. In addition, a PCI-based DAQ system has been developed as a fast and inexpensive tool for silicon detector and DAQ component testing in the production phase. We present an overview of the Run IIb silicon DAQ upgrade, emphasizing the new features and improvements incorporated into the constituent VME boards and discuss a PCI-based DAQ system developed to facilitate production tests.

Longevity studies in the CDF II silicon detector

The CDF Run II silicon detector is the largest operating detector of its kind in High Energy Physics, collecting pp¯ collision data at the Fermilab Tevatron since 2001. It provides precision tracking and vertexing which played a critical role in the Bs mixing discovery and is essential to the ongoing Higgs Boson search and many other physics analyses carried out at CDF. Due to the prolonged Tevatron Run II program the detector faces unforeseen challenges while operating well beyond its design parameters. Of particular concern is the radiation aging of the silicon sensors which are expected to acquire ∼10 fb−1 data, far above their design integrated luminosity of 2–3 fb−1. In this paper we discuss the impact of radiation damage to the sensors, their effect on the physics performance and expectations for future operations of the two inner layers, which have already inverted.