S. Haas

The ATLAS central level-1 trigger logic and TTC system

The ATLAS central level-1 trigger logic consists in the Central Trigger Processor and the interface to the detector-specific muon level-1 trigger electronics. It is responsible for forming a level-1 trigger in the ATLAS experiment. The distribution of the timing, trigger and control information from the central trigger processor to the readout electronics of the ATLAS subdetectors is done with the TTC system. Both systems are presented.

The Gigabit Link Interface Board (GLIB), a flexible system for the evaluation and use of GBT-based optical links

The Gigabit Link Interface Board (GLIB) is an evaluation platform and an easy entry point for users of high speed optical links in high energy physics experiments. Its intended use ranges from optical link evaluation in the laboratory to control, triggering and data acquisition from remote modules in beam or irradiation tests. The GLIB is an FPGA-based Advanced Mezzanine Card (AMC) conceived to serve a small and simple system residing either inside a Micro Telecommunications Computing Architecture (μTCA) crate, or on a bench with a link to a PC. This paper presents the architecture of the GLIB, its features as well as examples of its use in different setups.

The base-line DataFlow system of the ATLAS trigger and DAQ

The base-line design and implementation of the ATLAS DAQ DataFlow system is described. The main components of the DataFlow system, their interactions, bandwidths, and rates are discussed and performance measurements on a 10% scale prototype for the final ATLAS TDAQ DataFlow system are presented. This prototype is a combination of custom design components and of multithreaded software applications implemented in C++ and running in a Linux environment on commercially available PCs interconnected by a fully switched gigabit Ethernet network.

Topological and Central Trigger Processor for 2014 LHC luminosities

The ATLAS experiment is located at the European Center for Nuclear Research (CERN) in Switzerland. It is designed to observe collisions at the Large Hadron Collider (LHC): the worlds largest and highest-energy particle accelerator. Event triggering and Data Acquisition is one of the extraordinary challenges faced by the detectors at the high luminosity LHC collider upgrade. During 2011, the LHC reached instantaneous luminosities of 4 × 1033cm-1s-1 and produced events with up to 24 interactions per colliding proton bunch. This places stringent operational and physical requirements on the ATLAS Trigger in order to reduce the nominal 40MHz collision rate to a manageable event storage rate up to 400Hz and, at the same time, select those events considered interesting. The Level-1 Trigger is the first rate-reducing step in the ATLAS Trigger, with an output rate of 75kHz and decision latency of less than 2.5μs. It is primarily composed of the Calorimeter Trigger, Muon Trigger, the Central Trigger Processor (CTP) and by 2014 a complete new electronics module: the Topological Processor (TP). The TP will make it possible, for the first time, to concentrate detailed information from sub-detectors in a single Level-1 module. This allows the determination of angles between jets and/or leptons, or even more complex observables such as muon isolation or invariant mass. This requires to receive on a single module a total bandwidth of about 1Tb/s and process the data within less than 100 ns. In order to accept this new information from the TP, the CTP will be upgraded to process double the number of trigger inputs and logical combinations of these trigger inputs. These upgrades also address the growing needs of the complete Level-1 trigger system as LHC luminosity increases. During the LHC shutdown in 2013, the TP and the upgraded CTP will be installed. We present the justification for such an upgrade, the proposed upgrade to the CTP, and tests on the TP demonstrator and prototype, emphasizing the characterization of the high speed links and tests of the topological algorithms latency and logic utilization.

The Gigabit Link Interface Board (GLIB) ecosystem

The Gigabit Link Interface Board (GLIB) project is an FPGA-based platform for users of high-speed optical links in high energy physics experiments. The major hardware component of the platform is the GLIB Advanced Mezzanine Card (AMC). Additionally to the AMC, auxiliary components are developed that enhance GLIB platforms I/O bandwidth and compatibility with legacy and future triggering and/or data acquisition interfaces. This article focuses on the development of the auxiliary components that together with the GLIB AMC offer a complete solution for beam/irradiation tests of detector modules and evaluation of optical links.

Deployment and use of the ATLAS DAQ in the combined test beam

The ATLAS collaboration at CERN operated a combined test beam (CTB) from May until November 2004. The prototype of ATLAS data acquisition system (DAQ) was used to integrate other subsystems into a common CTB setup. Data were collected synchronously from all the ATLAS detectors, which represented nine different detector technologies. Electronics and software of the first level trigger were used to trigger the setup. Event selection algorithms of the high level trigger were integrated with the system and were tested with real detector data. A possibility to operate a remote event filter farm synchronized with ATLAS TDAQ was also tested. Event data, as well as detectors conditions data were made available for offline analysis

The ATLAS level-1 muon to central trigger processor interface

The Muon to Central Trigger Processor Interface (MUCTPI) is part of the ATLAS Level-1 trigger system and connects the output of muon trigger system to the Central Trigger Processor (CTP). At every bunch crossing (BC), the MUCTPI receives information on muon candidates from each of the 208 muon trigger sectors and calculates the total multiplicity for each of six transverse momentum (pT) thresholds. This multiplicity value is then sent to the CTP, where it is used together with the input from the Calorimeter trigger to make the final Level-1 Accept (L1A) decision. In addition the MUCTPI provides summary information to the Level-2 trigger and to the data acquisition (DAQ) system for events selected at Level-1. This information is used to define the regions of interest (RoIs) that drive the Level-2 muontrigger processing. The MUCTPI system consists of a 9U VME chassis with a dedicated active backplane and 18 custom designed modules. The design of the modules is based on state-of-the-art FPGA devices and special attention was paid to low-latency in the data transmission and processing. We present the design and implementation of the final version of the MUCTPI. A partially populated MUCTPI system is already installed in the ATLAS experiment and is being used regularly for commissioning tests and combined cosmic ray data taking runs. I. ATLAS FIRST LEVEL MUON TRIGGER The ATLAS Level-1 trigger [1] uses information on clusters and global energy in the calorimeters and multiplicities from tracks found in the dedicated fast muon trigger detectors in order to reduce the event rate to 100 kHz with an overall latency of less than 2.5 μs. The muon trigger detectors are resistive plate chambers (RPC) in the barrel region and thin-gap chambers (TGC) in the end-cap and forward regions of ATLAS. Coincidences of hits in different detector layers are used to identify muon candidates. The muon trigger electronics also determines the transverse-momentum (pT) of the muon candidates and classifies them according to six programmable pT thresholds. The muon trigger detectors are divided into sectors, 64 for the barrel, 96 for the end-cap and 48 for the forward region. Each sector can identify up to two muon candidates. The trigger sector logic modules send information about the position and pT threshold of the muon candidates to the MUCTPI at the bunch crossing (BC) rate of 40.08 MHz. An overview of the muon trigger system is shown in Figure 1 below.

Commissioning of the ATLAS level-1 central trigger

The ATLAS Level-1 Central Trigger consists of the Central Trigger Processor (CTP) and the Muon-to-CTP-Interface (MUCTPI). The CTP receives trigger information from the Level-1 Calorimeter Trigger system directly, and from the Level-1 Muon Trigger systems through the MUCTPI. It also receives timing signals from the LHC machine, and fans them out along with the Level-1 Accept (L1A) signal and other control signals to all sub-detectors. From them, it collects BUSY signals in order to throttle the L1A generation. Upon L1A the Level-1 trigger systems send region-of-interest information to the Level-2 trigger system. The MUCTPI and CTP crates are already installed in the ATLAS underground counting rooms with final or close-to-final boards. We present their status and discuss first commissioning steps. Particular emphasis is put on the integration of the Central Trigger with the Muon and Calorimeter Trigger systems, the Level-2 trigger, and the readout part of the different sub-detectors.

Upgrade of the ATLAS Central Trigger for LHC Run-2

The increased energy and luminosity of the LHC in the run-2 data taking period requires a more selective trigger menu in order to satisfy the physics goals of ATLAS. Therefore the electronics of the central trigger system is upgraded to allow for a larger variety and more sophisticated trigger criteria. In addition, the software controlling the central trigger processor (CTP) has been redesigned to allow the CTP to accommodate three freely configurable and separately operating sets of sub detectors, each independently using the almost full functionality of the trigger hardware. This new approach and its operational advantages are discussed as well as the hardware upgrades.

The ATLAS Level-1 Muon Topological Trigger Information for Run 2 of the LHC

For the next run of the LHC, the ATLAS Level-1 trigger system will include topological information on trigger objects from the calorimeters and muon detectors. In order to supply coarse grained muon topological information, the existing MUCTPI (Muon-to-Central-Trigger-Processor Interface) system has been upgraded. The MIOCT (Muon Octant) module firmware has been then modified to extract, encode and send topological information through the existing MUCTPI electrical trigger outputs. The topological information from the muon detectors will be sent to the Level-1 Topological Trigger Processor (L1Topo) through the MUCTPI-to-Level-1-Topological-Processor (MuCTPiToTopo) interface. Examples of physics searches involving muons are: search for Lepton Flavour Violation, Bs-physics, Beyond the Standard Model (BSM) physics and others. This paper describes the modifications to the MUCTPI and its integration with the full trigger chain.