S. Kiryu

Development of quantum hall array resistance standards at NMIJ

An experimental device of quantum Hall array resistance standards with a nominal value close to 10 kOmega on the i = 2 plateau and a parallel array of two Hall bars have been developed. The latter array clearly shows quantized Hall resistance of a quarter value of the von Klitzing constant, RK on the i = 2 plateau.

Development of a one-chip quantized Hall resistance voltage divider

A resistive voltage divider, which is constructed from a binary segmented series array of quantized Hall resistance (QHR) bars fabricated on one chip, named the ?QHR voltage divider?, has been developed. The QHR voltage divider does not, in principle, require time-consuming bootstrap self-calibration and will provide voltage ratios that are defined by fundamental physical constants with small uncertainties. To evaluate the performance of the QHR voltage divider, the dependence of the Hall resistances RH?of all serial segments on the magnetic flux density was measured. The results of the RH?measurement showed large and well-defined plateaus, and it was confirmed that the fabricated QHR divider in conjunction with a suitable voltage source would function as a voltage divider. From a preliminary test of the voltage ratios of the QHR voltage divider, deviations from nominal ratios were measured to be less than 1.4???10?6, and the expanded uncertainty of the measurement was estimated to be less than 4.1???10?6.

Development of a voltage divider based on quantized Hall resistance arrays for a high DC voltage standard II

A one-chip quantized voltage divider device based on the technology of integration of quantized Hall resistance (QHR) bars on a GaAs/AlGaAs Heterostructure Substrate has been developed. The first experimental QHR voltage divider device, which consists of a series of 20 QHR bars, has been fabricated. A preliminary test in our evaluation study of the device clearly shows that it functions as a voltage multiplier/divider.

Development of on-chip double-shielded quantum Hall device for use in ac quantized Hall resistance measurement

We have developed a on-chip double-shielded quantum Hall device and a double-shielded chip-carrier. The device in conjunction with the carrier will realize impedance standard based on the quantum Hall effect. In this configuration, the Hall bar is covered by separated on-chip shields and shields of the chip carrier to retrieve the leakage current. In this paper, we show detail of the QHR device fabrication and the structure of the chip carrier.

Development of 10 KΩ quantum Hall array resistance standards at NMIJ

An experimental device of quantum Hall array resistance standards (QHARS) with a nominal value close to 10 kΩ on the i = 2 plateau have been developed on a GaAs/AlGaAs hetero-substrate. This device consists of just 266 Hall bar elements that are connected by triple connection technique. Its nominal value has only 0.034 2 ppm differences from the integer value of 104. This array device clearly shows the well-quantized 10 kΩ plateau (i=2).

Utilization of a cryo-prober system for operation of a pulse-driven josephson junction array

We demonstrated the operation of pulse-driven Josephson junction arrays (JJAs) for AC voltage standard using a wideband cryo-prober system with a 4-K Gifford-MacMahon (GM) cooler. This unique system was originally developed for high-speed network switch applications of rapid-single-flux-quantum (RSFQ) circuits and enables wideband data transmission at bit rates of higher than 10 Gbps between room-temperature and cryogenic environments. JJA chips were fabricated using NbN-based superconductor-normal metal-superconductor (SNS) junctions. A 5-mm chip was mounted on a 16-mm chip carrier using flip-chip bonding technology for probe contact. To obtain bipolar output voltages, we tried two types of testing based on the AC coupling technique proposed by the National Institute of Standards and Technology (NIST). A pulse pattern generator (PPG) with a large memory of 134 Mbit was used for covering a wide frequency range of output signals. As a result, we succeeded in bipolar operation of the JJA, generating waveforms at frequencies from 60 Hz to several tens of kilo hertz. The maximum rms voltage obtained for a single array was 12.7 mV. The observed spurious level was lower than -93 dBc at 16 kHz.

Josephson junction array driven by modulated optical combs

We have performed an experiment to drive an over-damped Josephson junction array (JJA) with modulated current pulse trains, which are generated by a modulated optical comb (an ultra-short pulse laser). The intensities of optical pulse trains are modulated using a pulse pattern generator. We quantitatively verified that the output voltages of the JJA were consistent with the modulation signals.

Experimental Demonstration of Current Dependence Evaluation of Voltage Divider Based on Quantized Hall Resistance Voltage Divider

The National Metrology Institute of Japan has developed a resistive voltage divider (RVD), which is constructed from a series array of quantized Hall resistance (QHR) bars named “QHR voltage divider” fabricated on one chip. In principle, the QHR voltage divider does not need time-consuming bootstrap self-calibration and is not affected by measurement conditions such as ambient temperature and measurement current Therefore the QHR voltage divider is suitable for use as a reference standard for characteristic evaluation of conventional RVDs. In this paper, the evaluation of RVD current dependence based on the QHR voltage is demonstrated.

Evaluation of a voltage divider based on quantized Hall resistance arrays

A one-chip quantized voltage divider device based on integrated quantized Hall resistance (QHR) technology has been developed. A QHR voltage divider device that consists of a series of thirty-two quantized Hall bars has been fabricated. The dependence of the Hall resistance RH on the magnetic flux density showed that the device will function as a voltage divider. From the preliminary test of the 1:1 voltage ratio evaluation, the deviation from the nominal voltage ratio of 1:1 was estimated to be less than ± 10 × 10-6.

Integrated cryogenic current comparator based on superconductor LSI technology

A new implementation of Sullivan-Dziuba type cryogenic current comparators (CCCs) is proposed. We designed an integrated CCC device consisting of a thin-film CCC, a pick-up coil and a SQUID sensor on a single chip. Prototype devices were fabricated by using a superconductor multilayer integrated circuit technology with chemical-mechanical polishing processes.