S. Koike

The silicon vertex detector for the super B factory

The silicon vertex detector (SVD2) of the Belle experiment at KEK (Tsukuba, Japan) is currently close to its limits in terms of the occupancy of the innermost layer and the readout dead time. In order to cope with further increase in luminosity, different levels of upgrades are proposed: small improvements are possible in the short term by tuning the current system at the cost of signal-to-noise and crosstalk. In 2007, the two inner layers of the SVD2 will be replaced by similar detectors with faster readout electronics (SVD2.5) and in the long term, a major upgrade of the full silicon vertex detector (SVD3) is envisaged for the KEK Super B Factory. These upgrade scenarios will be discussed in detail from the hardware point of view along with the options under study.

Vertex detector for the KEK B-factory

Abstract We are designing a silicon vertex detector to be installed in a detector for the KEK Asymmetric B-factory project. In order to fulfill the accuracy required for the vertex resolution from the physics motivation we made several studies about the various aspects of the construction technology as well as the studies, is presented. The validity and performance of the design are also discussed through which was derived from the above studies, is presented. The validity and performance of the design are also discussed through results of a study of the detector simulation which incorporated a capacitive network model for the distribution of collected charge.

Spatial resolution of silicon microstrip detector for particles with large incident angle

Abstract Spatial resolution of a silicon microstrip detector was investigated experimentally for the charged particles with incident angles of 0°, 10°, 30°, 50°, 60°, 70° and 75°. The resolution for normal incidence was found to be 5.7 μm with the standard centroid technique for induced charge. In order to achieve better resolution for large angle incidence, a new centroid method was developed, with which the position resolution of 40μm was achieved for the particles with incident angle of 75°.

Construction and test of the first Belle II SVD ladder implementing the origami chip-on-sensor design

The Belle II Silicon Vertex Detector comprises four layers of double-sided silicon strip detectors (DSSDs), consisting of ladders with two to five sensors each. All sensors are individually read out by APV25 chips with the Origami chip-on-sensor concept for the central DSSDs of the ladders. The chips sit on flexible circuits that are glued on the top of the sensors. This concept allows a low material budget and an efficient cooling of the chips by a single pipe per ladder. We present the construction of the first SVD ladders and results from precision measurements and electrical tests.

Belle II silicon vertex detector

The Belle II experiment at the SuperKEKB collider in Japan is designed to indirectly probe new physics using approximately 50 times the data recorded by its predecessor. An accurate determination of the decay-point position of subatomic particles such as beauty and charm hadrons as well as a precise measurement of low-momentum charged particles will play a key role in this pursuit. These will be accomplished by an inner tracking device comprising two layers of pixelated silicon detector and four layers of silicon vertex detector based on double-sided microstrip sensors. We describe herein the design, prototyping and construction efforts of the Belle-II silicon vertex detector.

Development of new assembly techniques for a silicon micro-vertex detector unit using the flip-chip bonding method

Abstract Full-size models of a detector unit for a silicon micro-vertex detector were built for the KEK B factory. The Flip-Chip Bonding (FCB) method using a new type anisotropic conductive film was examined. The structure using the FCB method successfully provides a new architecture for the silicon micro-vertex detector unit.

Level-1 silicon vertex detector trigger at Belle

We present a newly developed fast trigger system that uses the silicon vertex detector (SVD) for the Belle experiment at the KEKB energy-asymmetric e/sup +/e/sup -/ collider. It is designed to issue the trigger with a latency of 1.85 /spl mu/s for the Belle central trigger system (GDL). The primary purpose of the SVD trigger is to reduce beam-induced background events by requiring tracks that come from the interaction point. The system receives trigger signals from VA1TA front-end integrated circuits, which read out signals on the silicon-strips. SVD tracks are constructed with them in combination with the trigger information of the central drift chamber (CDC), which is located outside the SVD. Performance of the SVD trigger is evaluated with collision data.

The Belle L1.5 trigger

During the summer shutdown of 2003 the new silicon vertex detector SVD2 was installed in Belle at the KEK-B factory in Tsukuba, Japan and started to take data in October 2003. It provides important improvements in the tracking capabilities and adds new trigger functionality. In addition a new hardware trigger level 1.5 was designed and installed that takes advantage of the digitized SVD hit data. The improvement in the Belle trigger system is important to deal with the increasing luminosity and higher beam currents of the KEK-B collider. The design of the level 1.5 trigger system is reviewed and results from the data taking are presented.