S.R. Doradla
Indian Institute of Technology Kanpur
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Featured researches published by S.R. Doradla.
IEEE Transactions on Power Electronics | 1988
Sujoy Deb; Avinash Joshi; S.R. Doradla
A steady-state analysis of the parallel-resonant converter is presented using a novel frequency-domain model. Various circuit variables are determined by simple expressions for both the frequency and the phase control techniques, simplifying the steady-state analysis. The existence of a multiple conduction mode is pointed out. The variations of output voltage, turn-off time, output power, and converter efficiency are studied. >
IEEE Transactions on Industry Applications | 1985
S.R. Doradla; C. Nagamani; Subhankar Sanyal
The external performances such as power factor, displacement factor, harmonic factor, and ripple factor of a three-phase ac to dc converter-fed separately excited dc motor drive employing sinusoidal pulsewidth modulation (SPWM) control technique are obtained for different speeds and modulation indexes. Since separately excited dc motors with armature voltage control provide constant torque operation, the external performance is also determined for the drive motor operating at different values of constant load torque. Motoring and regenerating operations of the dc drive machine are considered. The three-phase PWM converter-motor drive system is analyzed, taking commutation effects into account in motoring and regenerating operations. The analysis has revealed 27 common modes in one repetitive period of the output voltage. The sequence of modes for all pulses in one period of the output voltage is established. Experimental oscillograms of typical waveforms from a laboratory-sized dc motor are illustrated to verify the basic principles of operation. Although the converter circuit requires some additional components in comparison with the commonly used phase-controlled converter, the improved performance characteristics make it attractive for industrial applications involving large power ratings.
power electronics specialists conference | 1995
Vijay V. Deshpande; S.R. Doradla; Deepakraj M. Divan
A simplified parallel resonant DC link (PRDCL) inverter topology with reduced peak voltage is presented. A novel current prediction scheme which facilitates interfacing the resonant link topology to an AC motor is proposed. Various simulation waveforms and experimental results are given to show the effectiveness of the proposed current prediction scheme. Some studies relating to the selection of resonant component values and the characteristic impedance of the link on the voltage overshoot are presented. This study makes it possible to design drives without clamping. >
power electronics specialists conference | 1991
P.P. Roy; S.R. Doradla; S. Deb
The steady-state analysis of the series resonant converter with a capacitive output filter is studied using a frequency-domain model. The expressions for the resonant current and the capacitor voltage are derived. The converter shows multiple continuous conduction mode with continuous gate/base drive pulses. The performance characteristics relating to output voltage, output current, switching frequency, and feedback diode conduction angle are given. The input power, output power, and efficiency of the series resonant converter with finite quality factor are included. Some guidelines in the selection of component values and their ratings are given with an illustrative example.<<ETX>>
applied power electronics conference | 1994
Vijay V. Deshpande; S.R. Doradla
A new topology for a parallel resonant DC link is proposed. It offers reduced peak DC link voltage without generating high di/dt. The effect of various parameters on the link voltage waveform is discussed. A design procedure is outlined to determine the component values for any desired resonant frequency. A comparison with the actively clamped circuit is given. There is an excellent correlation between the experimental and simulation results.<<ETX>>
power electronics specialists conference | 1988
Badrul H. Khan; S.R. Doradla; Gopal K. Dubey
A dual converter comprised of two three-phase AC-DC pulse width-modulated (PWM) gate-turn-off (GTO) thyristor converters is proposed. The gating pulse pattern of the converters is chosen so that no circulating current flows between the converters when they are operated simultaneously. In addition, a good input power factor is obtained with less ripple in the output current. A symmetrical type of grating is worked out in which all the GTOs in the converter are switched an equal number of times during each cycle of the source voltage. The motor current is free to reverse naturally at any moment; hence, the possibility of discontinuous conduction of the motor current is not there. A four-quadrant closed-loop speed-controlled drive fed from the proposed dual converter is designed, constructed, and tested. The experimental results are in good agreement with theory.<<ETX>>A dual converter comprised of two three-phase AC-DC pulse width-modulated (PWM) gate-turn-off (GTO) thyristor converters is proposed. The gating pulse pattern of the converters is chosen so that no circulating current flows between the converters when they are operated simultaneously. A good input power factor is obtained with less ripple in the output current. A symmetrical type of gating is worked out in which all the GTOs in the converter are switched an equal number of times during each cycle of the source voltage. The motor current is free to reverse naturally at any moment, hence discontinuous conduction of the motor current can not occur. A four-quadrant closed-loop speed-controlled DC motor drive fed from the proposed dual converter has been designed, constructed, and tested. The experimental results obtained are shown to be in good agreement with theory.<<ETX>>
IEEE Transactions on Industry Applications | 1991
B. H. Khan; S.R. Doradla; Gopal K. Dubey
A comparative study of equal, triangular, stepped, sinusoidal, and inverted sinusoidal pulse-width modulation (PWM) schemes on the source and load performances of a three-phase AC-DC gate turn-off (GTO) thyristor converter-fed DC motor is presented. The two-quadrant GTO thyristor converter employing an equal pulse-width modulation (EPWM) scheme is studied in detail. This scheme has been found to offer better overall performance among the PWM schemes considered. A new symmetrical gate pulse pattern that reduces the total number of switchings and allows switching GTOs an equal number of times in each supply cycle is reported. The symmetrical gate pulse pattern has a beneficial effect on the switching loss, especially when the switching frequency is high. Smooth and continuous transition is obtained between rectification and inversion with a single GTO converter. The proposed converter was designed, constructed, and tested using a 3 HP laboratory-sized separately excited DC motor. The exponential results are shown to be in good agreement with the theory. >
international conference on power electronics and drive systems | 2001
S. Behera; Shyama P. Das; S.R. Doradla
A simple, modified, DC rail soft-switched quasi-resonant circuit is proposed for a 400 Hz voltage source inverter for aero-space application. The proposed soft-switched topology consists of two switches, a resonant inductor and two different capacitors of small size. The advantage of this topology is that the DC link voltage is clamped to the source voltage without any circulating energy. The circuit is analysed through the SABER simulator and the results from simulation have been reported. The experimental circuit is designed and tested for a simple R-L load and then connected to a voltage source inverter (VSI) operating under space vector modulation (SVM).
IEEE Transactions on Power Electronics | 1993
B.H. Khan; Gopal K. Dubey; S.R. Doradla
A four-quadrant converter employing a single six-GTO bridge and four thyristors as reversing switches is described. Such a four-quadrant converter is economical compared to a dual converter employing two bridges, each with six GTOs. A four-quadrant DC drive employing the proposed converter and closed-loop speed control with inner current control loop is also presented. The controllers are designed using symmetric optimization. The experimental results are given for the steady-state and transient response of the drive. A comparative study of the present four-quadrant drive and one reported earlier is also presented.<<ETX>>
applied power electronics conference | 2003
S. Behera; Shyama P. Das; S.R. Doradla
A novel quasi-resonant inverter is proposed for a high performance induction motor drive. With the exception of auxiliary switch in the resonant link, all other devices in the resonant link and inverter are operated under zero-voltage switching (ZVS). The auxiliary switch is turned on under zero-current switching (ZCS), but turned off hard. The DC link voltage is clamped to source voltage. The quasi-resonant inverter-fed induction motor is operated under direct torque control (DTC) scheme. The d-q model of the complete scheme is formulated and analyzed by SABER simulator. The simulation is extended with a robust, reduced order stator flux observer. Both the schemes with and without observer have been implemented on a laboratory-sized experimental setup. A comparison of simulation and experimental results under identical operating conditions reveals good agreement.