S. V. Hattangady

On the feasibility of growing dilute CxSi1−x epitaxial alloys

Dilute CxSi1−x epitaxial films have been grown on Si(100) by remote plasma‐enhanced chemical vapor deposition. Carbon concentrations of ∼3 at.% have been achieved at a growth temperature of 725 °C. No evidence for the formation or precipitation of SiC was found using x‐ray diffraction and transmission electron microscopy.

Low interface state density SiO2 deposited at 300 °C by remote plasma‐enhanced chemical vapor deposition on reconstructed Si surfaces

A 300 °C process has been used to deposit high‐quality SiO2 on Si. The process is based on remote plasma‐enhanced chemical vapor deposition. In this process excited species from a remote oxygen plasma interact with silane in the deposition zone. A hydrogen plasma is used to clean the silicon surface in situ just prior to deposition. After a 400 °C post‐metallization anneal, interface‐state densities as low as 3.7×1010 cm−2 eV−1 were measured with a fixed charge density of 2×1011 cm−2. The films exhibited good breakdown integrity, sustaining fields of 9–10 MV cm−1. The Si/SiO2 interface‐state density directly correlates with the quality of reflection high‐energy electron diffraction patterns from the silicon surface just prior to oxide deposition.

In situ cleaning of GaAs surfaces using hydrogen dissociated with a remote noble-gas discharge

In situ cleaning of GaAs surfaces has been achieved at 350 °C with a novel technique employing hydrogen that is excited and dissociated using a remote Ar discharge. Reconstructed surfaces characteristic of clean, As‐stabilized GaAs surfaces have been observed with reflection high‐energy electron diffraction following the cleaning treatment. Auger electron spectroscopy analyses confirm that such a treatment removes both carbon and oxygen contamination from the surface. X‐ray photoelectron spectroscopy shows the removal of oxygen bonded to both Ga and As on the surface. Emission spectroscopy shows evidence of excited molecular and atomic hydrogen with the downstream‐excitation process.

Demonstration of an n-channel inversion mode GaAs MISFET

Summary form only given. An operational GaAs inversion mode n-channel MISFET has been demonstrated using a composite SiO/sub 2/ (15 nm)/Si (1 nm)/GaAs structure. This result is based on an in situ hydrogen cleaning process (used to prepare the GaAs surface just prior to the Si-SiO/sub 2/ deposition), a low-temperature pseudomorphic Si deposition process, and a low-temperature high-quality SiO/sub 2/ deposition process, all performed sequentially in an ultrahigh-vacuum/load locked system. The first working devices exhibit a DC transconductance of 0.26 mS/mm at a gate length and width of 2 mu m and 50 mu m, respectively. Capacitance-voltage analysis of MIS capacitors on chip with the transistors indicates that the midgap electron trap density is on the order of 4*10/sup 11/ cm/sup -2/.<<ETX>>

Gating of germanium surfaces using pseudomorphic silicon interlayers

A novel insulator structure for gating of germanium surfaces has been developed. The structure consists of a very thin (on the order of 10 A) pseudomorphic silicon layer deposited on the germanium surface prior to deposition of a silicon dioxide insulating layer. Both the silicon and silicon dioxide layers were deposited at low temperature by remote plasma‐enhanced chemical vapor deposition. Low interface state densities and surface inversion have been obtained for both n‐ and p‐type germanium substrates. X‐ray photoelectron spectroscopy and ion scattering spectroscopy analysis indicate that the thin pseudomorphic silicon layer provides complete silicon coverage of the germanium surface. The silicon layer protects the germanium surface from undesirable oxidation during the silicon dioxide deposition. The electrical properties of germanium metal‐insulator‐semiconductor structures which incorporated the silicon interlayer were much improved compared to structures in which the silicon dioxide was deposited d...

The role of an ultrathin silicon interlayer at the SiO2‐Ge interface

Recent studies [Hattangady et al., Appl. Phys. Lett. 57, 581 (1990)] have shown greatly reduced interface state densities (5×1010 cm−2 eV−1) in Ge‐based, metal‐insulator‐semiconductor structures with the use of an ultrathin, pseudomorphic Si interlayer between the gate dielectric, SiO2, and the Ge semiconductor substrate. The Si and the SiO2 layers are deposited in situ and sequentially at low temperature (300 °C) in a remote‐plasma‐enhanced chemical‐vapor‐deposition system. This report presents an analysis of the Si‐Ge heterostructure before and after the SiO2 deposition. Low‐energy He ion scattering spectroscopy shows that the silicon layer (28 A) provides complete coverage of the Ge surface prior to the deposition of the SiO2 film. The existence of the silicon interlayer after the remote‐plasma‐enhanced deposition of 150 A of the SiO2 film is established by x‐ray photoelectron spectroscopy (XPS). Throughout a cumulative series of thin (∼10 A) oxide depositions, XPS showed no evidence of Ge oxidation st...

Epitaxial silicon deposition at 300 °C with remote plasma processing using SiH4/H2 mixtures

Epitaxial Si films have been deposited on Si(100) at 300 °C by remote plasma‐enhanced chemical vapor deposition using SiH4/H2 mixtures with deposition rates as high as 25 A/min at these low temperatures. Hall measurements of the film show an unintentional doping level of about 1×1017 cm−3 with electron mobilities of 700 cm2 V−1s−1. Critical to the process is the in situ cleaning of the silicon substrate surface prior to deposition.

Interface engineering with pseudormorphic interlayers: Ge metal‐insulator‐semiconductor structures

Significant improvements in gating of Ge surfaces are achieved with the use of thin, pseudomorphic Si interlayers. Metal‐insulator‐semiconductor structures with mid‐gap interface state densities of 5×1010 cm−2 eV−1 and showing no hysteresis have been realized on both n‐ and p‐type Ge. The key elements of this technology are: surface cleaning, deposition of a thin Si interlayer, and the deposition of the gate dielectric, SiO2, all of which are performed in situ and sequentially at 300 °C in a single chamber with the remote plasma technique. Ion scattering spectroscopy shows complete coverage of the Ge surface by the Si layer. X‐ray photoelectron spectroscopy shows the Si interlayer is about 18 A thick. The Si interlayer prevents the interfacial oxidation of the underlying Ge.

Effect of rf power on remote‐plasma deposited SiO2 films

Significant improvement in material and electrical properties of SiO2 films deposited by low‐temperature remote plasma‐enhanced chemical vapor deposition take place as the rf power to the plasma discharge is increased. The deposition rate increases, and the index of refraction at 632.8 nm, the frequency of the dominant Si—O—Si bond‐stretching vibration in the infrared absorption spectrum, the etch rate, and the static dielectric constant of the remote‐plasma deposited films all approach those of thermally grown SiO2 films with increasing rf power to the plasma discharge. The total compressive stress in the oxides deposited at high power, ∼300 W, is about 20% higher than that in oxides deposited at lower power, ∼30 W. Comparison of film properties with those of plasma‐deposited substoichiometric oxides (SiOx, x≤2) and thermally grown stoichiometric oxides SiO2 leads us to conclude that (i) the films deposited at rf levels from 10 to 300 W are homogeneous stoichiometric oxides SiO2, (ii) correlated variatio...

Low-temperature annealing of As-implanted Ge

Furnace annealing (FA) and rapid thermal anealing (RTA) of As75‐implanted Ge is studied and contrasted. Activation has been observed in furnace‐annealed samples at 500 °C. Rapid thermally annealed samples show activation at 575 °C and thereafter. Diffusion effects are significant during FA above 575 °C, while RTA is accompanied with very little dopant diffusion. Damage annealing is best in the FA samples as indicated by the mobility profiles. A dual process such as a 430 °C‐FA/650 °C‐RTA offers best results for activation, especially in the case of low‐dose implants (∼97%). Carrier concentration profiles resemble theoretical implant profiles except near the surface where a region of high concentration is observed.