S.X. Zhang

Freestanding ultrathin single-crystalline SiC substrate by MeV H ion-slicing

SiC is a widely used wide-bandgap semiconductor, and the freestanding ultrathin single-crystalline SiC substrate provides the material platform for advanced devices. Here, we demonstrate the fabrication of a freestanding ultrathin single-crystalline SiC substrate with a thickness of 22 μm by ion slicing using 1.6 MeV H ion implantation. The ion-slicing process performed in the MeV energy range was compared to the conventional case using low-energy H ion implantation in the keV energy range. The blistering behavior of the implanted SiC surface layer depends on both the implantation temperature and the annealing temperature. Due to the different straggling parameter for two implant energies, the distribution of implantation-induced damage is significantly different. The impact of implantation temperature on the high-energy and low-energy slicing was opposite, and the ion-slicing SiC in the MeV range initiates at a much higher temperature.SiC is a widely used wide-bandgap semiconductor, and the freestanding ultrathin single-crystalline SiC substrate provides the material platform for advanced devices. Here, we demonstrate the fabrication of a freestanding ultrathin single-crystalline SiC substrate with a thickness of 22 μm by ion slicing using 1.6 MeV H ion implantation. The ion-slicing process performed in the MeV energy range was compared to the conventional case using low-energy H ion implantation in the keV energy range. The blistering behavior of the implanted SiC surface layer depends on both the implantation temperature and the annealing temperature. Due to the different straggling parameter for two implant energies, the distribution of implantation-induced damage is significantly different. The impact of implantation temperature on the high-energy and low-energy slicing was opposite, and the ion-slicing SiC in the MeV range initiates at a much higher temperature.

Efficient ion-slicing of InP thin film for Si-based hetero-integration

Integration of high quality single crystalline InP thin film on Si substrate has potential applications in Si-based photonics and high-speed electronics. In this work, the exfoliation of a 634 nm crystalline InP layer from the bulk substrate was achieved by sequential implantation of He ions and H ions at room temperature. It was found that the sequence of He and H ion implantations has a decisive influence on the InP surface blistering and exfoliation, which only occur in the InP pre-implanted with He ions. The exfoliation efficiency first increases and then decreases as a function of H ion implantation fluence. A kinetics analysis of the thermally activated blistering process suggests that the sequential implantation of He and H ions can reduce the InP thin film splitting thermal budget dramatically. Finally, a high quality 2 inch InP-on-Si(100) hetero-integration wafer was fabricated by He and H ion sequential implantation at room temperature in combination with direct wafer bonding.

Silicon-on-insulator with hybrid orientations for heterogeneous integration of GaN on Si (100) substrate

Heterogeneous integration of materials pave a new way for the development of the microsystem with miniaturization and complex functionalities. Two types of hybrid silicon on insulator (SOI) structures, i.e., Si (100)-on-Si (111) and Si (111)-on-Si (100), were prepared by the smart-cut technique, which is consist of ion-slicing and wafer bonding. The precise calculation of the lattice strain of the transferred films without the epitaxial matching relationship to the substrate was demonstrated based on X-ray diffraction (XRD) measurements. The XRD and Raman measurement results suggest that the transferred films possess single crystalline quality. With a chemical mechanical polishing (CMP) process, the surface roughness of the transferred thin films can be reduced from 5.57 nm to 0.30 nm. The 4-inch GaN thin film epitaxially grown on the as-prepared hybrid SOI of Si (111)-on-Si (100) by metalorganic chemical vapor deposition (MOCVD) is of improved quality with a full width at half maximum (FWHM) of 672.54 arcsec extracted from the XRD rocking curve and small surface roughness of 0.40 nm. The wafer-scale GaN on Si (111)-on-Si (100) can serve as a potential platform for the one chip integration of GaN-based high electron mobility transistors (HEMT) or photonics with the Si (100)-based complementary metal oxide semiconductor (CMOS).Heterogeneous integration of materials pave a new way for the development of the microsystem with miniaturization and complex functionalities. Two types of hybrid silicon on insulator (SOI) structures, i.e., Si (100)-on-Si (111) and Si (111)-on-Si (100), were prepared by the smart-cut technique, which is consist of ion-slicing and wafer bonding. The precise calculation of the lattice strain of the transferred films without the epitaxial matching relationship to the substrate was demonstrated based on X-ray diffraction (XRD) measurements. The XRD and Raman measurement results suggest that the transferred films possess single crystalline quality. With a chemical mechanical polishing (CMP) process, the surface roughness of the transferred thin films can be reduced from 5.57 nm to 0.30 nm. The 4-inch GaN thin film epitaxially grown on the as-prepared hybrid SOI of Si (111)-on-Si (100) by metalorganic chemical vapor deposition (MOCVD) is of improved quality with a full width at half maximum (FWHM) of 672.54 ar...

Investigation on thermodynamics of ion-slicing of GaN and heterogeneously integrating high-quality GaN films on CMOS compatible Si(100) substrates

Die-to-wafer heterogeneous integration of single-crystalline GaN film with CMOS compatible Si(100) substrate using the ion-cutting technique has been demonstrated. The thermodynamics of GaN surface blistering is in-situ investigated via a thermal-stage optical microscopy, which indicates that the large activation energy (2.5 eV) and low H ions utilization ratio (~6%) might result in the extremely high H fluence required for the ion-slicing of GaN. The crystalline quality, surface topography and the microstructure of the GaN films are characterized in detail. The full width at half maximum (FWHM) for GaN (002) X-ray rocking curves is as low as 163 arcsec, corresponding to a density of threading dislocation of 5 × 107 cm−2. Different evolution of the implantation-induced damage was observed and a relationship between the damage evolution and implantation-induced damage is demonstrated. This work would be beneficial to understand the mechanism of ion-slicing of GaN and to provide a platform for the hybrid integration of GaN devices with standard Si CMOS process.