Sadao Nakashima

Analysis of buried oxide layer formation and mechanism of threading dislocation generation in the substoichiometric oxygen dose region

The structure of SIMOX wafers implanted at 180 keV with doses of 0.1 × 10 18 -2.0 × 10 18 16 O + cm −2 at 550 °C, followed by annealing over the temperature range of 1050–1350 °C, has been investigated using cross-sectional transmission electron microscopy and a chemical etching. With doses of 0.35 × 10 18 -0.4 × 10 18 cm −2 , a continuous buried oxide layer having no Si island inside is formed by high-temperature annealing at 1350 °C. At a dose of 0.7 × 10 18 cm −2 , multilayered oxide striations appear in the as-implanted wafer. These striations grow into multiple buried oxide layers after annealing at 1150 °C. The multiple layers lead to a discontinuous buried oxide layer, resulting in the formation of a number of Si micropaths between the top Si layer and the Si substrate when the wafer is annealed at 1350 °C. These Si paths cause the breakdown electric field strength of the buried oxide layer to deteriorate. With doses of 0.2 × 10 18 -0.3 × 10 18 cm −2 and of higher than 1.3 × 10 18 cm −2 , an extremely high density of threading dislocations is generated in the top Si layer after annealing at 1350 °C. The dislocation density is greatly reduced to less than 10 3 cm −2 when the oxygen dose falls in the range of 0.35 × 10 18 -1.2 × 10 18 cm −2 . Here we propose a mechanism that accounts for the threading dislocation generation at substoichiometric oxygen doses of less than 1.2 × 10 18 cm −2 .

0.1- mu m-gate, ultrathin-film CMOS devices using SIMOX substrate with 80-nm-thick buried oxide layer

A 0.1- mu m-gate CMOS/SIMOX (separation by implanted oxygen) has been successfully fabricated using high quality SIMOX substrates and an advanced design concept for the subquarter-micron region based on a simple device model. In addition, both 85-nm-gate n- and p-MOSFETs/SIMOX with 8-nm-thick silicon active layer have been realized. High parasitic resistance in the source and drain regions of the 0.1- mu m-gate CMOS/SIMOX tends to increase the propagation delay time. However, 0.1- mu m-gate CMOS/SIMOX devices with a delay time as low as 10 ps can be obtained by reducing the parasitic resistance. >

Surface morphology of oxygen-implanted wafers

The surface morphology of SIMOX wafers implanted at 180 keV with doses of 0.4–2.2 ⊠ 10 18 16 O + cm −2 in a temperature range of 400–700 °C has been investigated using transmission electron microscopy (TEM) replica and cross-sectional TEM (XTEM) techniques. Wafer temperature during oxygen implantation strongly affects the morphology. A number of dents are formed on the surface of wafers implanted at temperatures higher than 510 °C with a dose of 1.8 ⊠ 10 18 cm −2 . Increasing the wafer temperature causes the dents to grow. The dents disappear by a high-temperature anneal of 1260 °C after the implantation. It is found that oxygen implantation through a 50-nm-thick screen oxide film prevents dent formation. A model explaining the dent formation and dent growth is also proposed.

Theoretical analysis on threshold characteristics of surface-channel MOSFET's fabricated on a buried Oxide

Simple models for threshold characteristics of surface-channel MOSFETs, which are fabricated on a buried oxide covered by an electric field shielding layer, are proposed. The electric field shielding effect is taken into account when the Poissons equation is solved. Threshold voltage expressions are derived from the solution of the Poissons equation and the surface-channel charge neutrality relationship. Theoretical analysis shows that the thinner silicon layer leads to enhancement of the electric field which results in the reduction of the short-channel effect.

Formation of Buried Oxide in Silicon by High-Dose Oxygen Implantation, and Application of this Technology to CMOS Devices

SIMOX ( S eparation by Im planted Ox ygen) technology has been developed for realization of oxygen-ion implanted SOI. The distribution of implanted oxygen was analyzed by Auger electron spectroscopy and Rutherford backscattering spectroscopy. The properties of the silicon oxide formed by oxygenion implantation were investigated by infrared spectra, capacitance-voltage characteristics, dielectric strength, and dielectric constants. The crystallinity of the top layer silicon and of the epitaxially-grown silicon layer was deter mined by electron-beam diffraction. An electric-field-shielding effect was observed in the polycrystalline silicon region which was formed between the top layer silicon and the buried oxide. High-speed digital and high-voltage analogue CMOS LSIs, a 1kb CMOS RAM and a BSH LSI, were successfully fabricated using SIMOX technology.