Salil Kumar Sanyal

A NOVEL BEAM-SWITCHING ALGORITHM FOR PROGRAMMABLE PHASED ARRAY ANTENNA

ANOVELBEAM-SWITCHINGALGORITHMFORPROGRAMMABLEPHASEDARRAYANTENNAS.K.SanyalDepartment of Electronics and Telecommunication EngineeringJadavpur UniversityKolkata, 700032, IndiaQ.M.AlfredDepartment of Electronics & Communication EngineeringDurgapur Institute of Advanced Technology & ManagementRajbandh, Durgapur, 713212, IndiaT.ChakravartyDepartment of Electronics & Communication EngineeringFuture Institute of Engineering & ManagementSonarpur Station Road, Kolkata, 700150, IndiaAbstract—In this paper a programmable beam-switching algorithmfor planar phased array antenna is presented. Using micro-controllerthe planar array can be steered over 49 directions over the completehemisphere. Each element is connected to delay lines and switchingmodule. The bits at micro-controller output after being amplifiedby driver circuit are fed to the switching modules which control theinsertion of fixed phase tapering. Switching is performed on a uniqueset of delay lines to steer the beam in particular direction in thehorizon. For high frequency application PIN diode is used as switch.In total 12 bits are used to select 49 beam positions with some bitpatterns being redundant.

A Novel Microstrip Patch Antenna with Large Impedance Bandwidth in VHF/UHF Rang

In this paper a novel antenna is presented. This antenna, employing microstrip circular disc as radiator is seen to perform over a large impedance bandwidth (130 MHz to 876 MHz). The disk resonator is loaded with L-C-R circuit across a selective location in the disk via a thin shorting pin. The theoretical modeling predicts TM01 mode of operation. Therefore the beam pattern shows a null in the broadside direction. The said antenna is proposed to be developed for end use in coal mine where the antenna can be flush mounted on coal strata. Thus it will be able to measure the angle of arrival of any reflective component due to presence of waterbed at a distance. The measured as well as simulated results regarding impedance bandwidth and beam pattern agrees well. The simulated efficiency using IE3D is 48% whereas measured efficiency is nearly 45%.

An Obstacle Based Realistic Ad-Hoc Mobility Model for Social Networks

An efficient deployment of a mobile ad-hoc network (MANET) requires a realistic approach towards the mobility of the hosts who want to communicate with each other over a wireless channel. Since ad-hoc networks are driven by human requirements, instead of considering the random movement of mobile nodes, we concentrate on the social desire of the nodes for getting connected with one another and provide here a framework for the mobility model of the nodes based on Social Network Theory. In this paper, we capture the preferences in choosing destinations of pedestrian mobility pattern on the basis of Social Factor (Y F ) and try to find out the essential impact of Y F on the Pause Time of the nodes. Also, instead of considering an unobstructed terrain, we carry out our simulations in presence of obstacles which block the node movement. Thus, we present here a more realistic mobility distribution pattern. Further, a relative comparison of the proposed model with the popular Random Way-Point (RWP) Model is also done.

Performance study of mobile WiMAX network with changing scenarios under different modulation and coding

WiMAX—the Worldwide Interoperability for Microwave Access is a promising technology for offering high-speed data, video and multimedia services over mobile platform evolving toward all IP networks. The increasing demand of WiMAX for VoIP and high-speed multimedia is due to the simplicity of installation and cost reduction compared with the traditional wired DSL cable. The challenges to service providers lie with the Quality of Service (QoS) under varying fading environment while at the same time maximizing for resource utilization. In this paper, a rigorous and comprehensive performance study of mobile WiMAX has been made with respect to adaptive modulation and coding techniques considering the variation in the speed of the mobile, path-loss, scheduling services and application type for comparing with the fixed type of modulations. The OPNET 14.5.A modeler for WiMAX platform has been used as simulator for adaptation at the physical layer of the transmission in WiMAX OFDMA structure. Observation reveals that dynamic adaptation of modulation and coding schemes based on channel condition enables better QoS while consuming low overall bandwidth of the system. Copyright

Novel design of Address Generator for WiMAX multimode interleaver using FPGA based finite state machine

Wireless technology is the fastest growing segment of the modern communication industry. The IEEE 802.16e standard, commonly known as mobile WiMAX, is the latest wireless technology that has promised to offer Broadband Wireless Access over long distance. The concept of OFDM is used in WiMAX to obtain high data rate in addition to reducing the effects like inter symbol interference and inter channel interference. It has proved to be the air interface for next generation Broadband Wireless System. In this paper, we present a finite state machine based novel technique to model the Address Generation circuitry of WiMAX multimode interleaver using VHDL on FPGA platform with all code rates and modulation schemes of IEEE 802.16e standard. Our approach provides better performance in terms of maximum operating frequency, use of flip-flops with negligible loss in terms of logic cells utilized compared to existing FPGA based implementations. Measured circuit parameters and software simulation of this model are also provided.

Genetic algorithm based efficient routing scheme for multicast networks

Due to the advent of many new multimedia applications in high speed networks, the issue of multicast routing has become more and more important. The multicast routing problem in computer networks is also known as the Steiner tree problem, which has been shown to be NP-complete. In this paper, we propose a new multicast routing scheme based on genetic algorithms (GA). To apply this algorithm to real networks, we also propose several methods for reducing the computational complexity. Computer simulations are conducted on a random graph to evaluate the performance of the proposed algorithm. Our numerical results show that the proposed algorithm is able to find a better solution than the conventional routing schemes. A very promising heuristic algorithm for the Steiner tree problem was proposed by Raywar-Smith. Finally, since many multimedia applications require multiple QoS constraints, such as delay, jitter, and packet loss, we extend the proposed algorithm to obtain a multi-constrained multicast tree.

Single CFA-Based Integrator, Differentiator, Filter, and Sinusoid Oscillator

A new multifunction configuration using a single current feedback amplifier (CFA) and a few RC components is presented. The analysis for the various signal processing function realizability had been carried out by utilizing the internal parasitic and transimpedance elements of the CFA (AD-844 or 846) device. The circuit implements the functions of integrator/differentiator, high-selectivity (Q ges 20) filters, and sinusoid oscillator (Q rarr infin) on the same topology with the appropriate design. Adjustment of the time constant (T), filter quality (Q), and oscillation frequency (omegao) may be obtained with single-component variation at extended frequency ranges (1-30 MHz). All of the proposed functional performances had satisfactorily been verified with PSPICE macromodel simulation and by hardware circuit implementation.

A NOVEL SCHEMATIC FOR CALIBRATION OF LARGE PHASED ARRAY ANTENNA USING PROGRAMMABLE TIME-DELAY UNITS

In this paper, a conceptual schematic for calibration of large phased array antenna is presented. Derived from an earlier work by the authors, the presentation demonstrates a simple yet innovative schematic of inserting time delay units with each element in the array which can be used to generate both SUM and DIFFERENCE pattern. Both these patterns are electronically steerable. The calibration is done using SUM-DIFFERENCE pattern. PIN switches are used to insert proper time delay units. Thus the schematic is completely programmable using a microcontroller to control the insertion of time delay. The details of the schematic is presented along with the generated antenna patterns.

LOADED MICROSTRIP DISK RESONATOR EXHIBITS ULTRA-LOW FREQUENCY RESONANCE

In this paper a novel method of generation of ultra- low resonance in a microstrip disk resonator is presented. The disk resonator is loaded with series L-C circuit across a selective location in the disk via a thin shorting pin. It is shown that in loaded disk resonator, the lowest resonance observed is in VHF range whereas the unloaded disk had a fundamental resonance at 1.76 GHz. This resonance is slightly offset from the series resonant frequency of L- C circuit. and it depends on the disk radius as well. Using IE3D, a commercial MoM solver, the said structure is simulated. The experimental results agree well with the simulated results. A closed form expression for computing the resonant frequency is given.

Design of a Novel FSM Based Reconfigurable Multimode Interleaver for WLAN Application

In the recent past, the IEEE 802.11 based wireless LAN has emerged as a prevailing broadband indoor networking technology. Fast spread of wireless data communication systems and the ever increasing demand for faster data rates require quick design, implementation and test of new wireless algorithms for data communications. In this paper we present a novel technique to model the interleaver used in IEEE 802.11a and IEEE 802.11g based WLAN in VHDL using Xilinx ISE. Our proposed technique comprises of finite state machine (FSM) based address generator and FPGAs internal resource based memory. The FSM based approach provides higher operating frequency and better FPGA resource utilization. Use of FPGAs embedded memory offers advantages like reduced access time, lesser occupancy of circuit board and lower power consumption than external memory based techniques. The interleaver memory is modeled using two different types of embedded memory; one with dedicated and the other with distributed memory. Comparative analysis between the two techniques has been made in respect of use of FPGAs internal resources, maximum operating frequency and power consumption. The simulation result obtained using ModelSim XE-III software is also presented.