Salvatore Di Franco

High responsivity 4H-SiC Schottky UV photodiodes based on the pinch-off surface effect

In this letter, high responsivity 4H-SiC vertical Schottky UV photodiodes based on the pinch-off surface effect, obtained by means of self-aligned Ni2Si interdigit contacts, are demonstrated. The diode area was 1mm2, with a 37% directly exposed to the radiation. The dark current was about 200pA at −50V. Under a 256nm UV illumination, a current increase of more than two orders of magnitude is observed, resulting in a 78% internal quantum efficiency. The vertical photodiodes showed an ultraviolet-visible rejection ratio >7×103 and a responsivity a factor of about 1.8 higher than a conventional planar metal-semiconductor-metal structure.

New Achievements on CVD Based Methods for SiC Epitaxial Growth

The results of a new epitaxial process using an industrial 6x2” wafer reactor with the introduction of HCl during the growth have been reported. A complete reduction of silicon nucleation in the gas phase has been observed even for high silicon dilution parameters (Si/H2>0.05) and an increase of the growth rate until about 20 µm/h has been measured. No difference has been observed in terms of defects, doping uniformity (average maximum variation 8%) and thickness uniformity (average maximum variation 1.2 %) with respect to the standard process without HCl.

Micro- and nanoscale electrical characterization of large-area graphene transferred to functional substrates

Summary Chemical vapour deposition (CVD) on catalytic metals is one of main approaches for high-quality graphene growth over large areas. However, a subsequent transfer step to an insulating substrate is required in order to use the graphene for electronic applications. This step can severely affect both the structural integrity and the electronic properties of the graphene membrane. In this paper, we investigated the morphological and electrical properties of CVD graphene transferred onto SiO2 and on a polymeric substrate (poly(ethylene-2,6-naphthalene dicarboxylate), briefly PEN), suitable for microelectronics and flexible electronics applications, respectively. The electrical properties (sheet resistance, mobility, carrier density) of the transferred graphene as well as the specific contact resistance of metal contacts onto graphene were investigated by using properly designed test patterns. While a sheet resistance R sh ≈ 1.7 kΩ/sq and a specific contact resistance ρc ≈ 15 kΩ·μm have been measured for graphene transferred onto SiO2, about 2.3× higher R sh and about 8× higher ρc values were obtained for graphene on PEN. High-resolution current mapping by torsion resonant conductive atomic force microscopy (TRCAFM) provided an insight into the nanoscale mechanisms responsible for the very high ρc in the case of graphene on PEN, showing a ca. 10× smaller “effective” area for current injection than in the case of graphene on SiO2.

Ambipolar MoS2 Transistors by Nanoscale Tailoring of Schottky Barrier Using Oxygen Plasma Functionalization

One of the main challenges to exploit molybdenum disulfide (MoS2) potentialities for the next-generation complementary metal oxide semiconductor (CMOS) technology is the realization of p-type or ambipolar field-effect transistors (FETs). Hole transport in MoS2 FETs is typically hampered by the high Schottky barrier height (SBH) for holes at source/drain contacts, due to the Fermi level pinning close to the conduction band. In this work, we show that the SBH of multilayer MoS2 surface can be tailored at nanoscale using soft O2 plasma treatments. The morphological, chemical, and electrical modifications of MoS2 surface under different plasma conditions were investigated by several microscopic and spectroscopic characterization techniques, including X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), conductive AFM (CAFM), aberration-corrected scanning transmission electron microscopy (STEM), and electron energy loss spectroscopy (EELS). Nanoscale current-voltage mapping by CAFM showed that the SBH maps can be conveniently tuned starting from a narrow SBH distribution (from 0.2 to 0.3 eV) in the case of pristine MoS2 to a broader distribution (from 0.2 to 0.8 eV) after 600 s O2 plasma treatment, which allows both electron and hole injection. This lateral inhomogeneity in the electrical properties was associated with variations of the incorporated oxygen concentration in the MoS2 multilayer surface, as shown by STEM/EELS analyses and confirmed by ab initio density functional theory (DFT) calculations. Back-gated multilayer MoS2 FETs, fabricated by self-aligned deposition of source/drain contacts in the O2 plasma functionalized areas, exhibit ambipolar current transport with on/off current ratio Ion/Ioff ≈ 103 and field-effect mobilities of 11.5 and 7.2 cm2 V-1 s-1 for electrons and holes, respectively. The electrical behavior of these novel ambipolar devices is discussed in terms of the peculiar current injection mechanisms in the O2 plasma functionalized MoS2 surface.

Very High Growth Rate Epitaxy Processes with Chlorine Addition

The growth rate of 4H-SiC epi layers has been increased by a factor 19 (up to 112 μm/h) with respect to the standard process with the introduction of HCl in the deposition chamber. The epitaxial layers grown with the addition of HCl have been characterized by electrical, optical and structural characterization methods. An optimized process without the addition of HCl is reported for comparison. The Schottky diodes, manufactured on the epitaxial layer grown with the addition of HCl at 1600 °C, have electrical characteristics comparable with the standard epitaxial process with the advantage of an epitaxial growth rate three times higher.

Comparison between Different Schottky Diode Edge Termination Structures: Simulations and Experimental Results

Four different Schottky diode edge terminations have been fabricated on 6H SiC. The metal contact was Ni2Si in all the structures and the epitaxial layer has a carrier concentrations of 3x10 cm and a thickness of 4 microns. With these characteristics of the epitaxial layer, the ideal breakdown voltages should be 800 V. In the best structure an edge efficiency of about the 95% has been reached. The comparison between the experimental and the simulated results shows that, when the breakdown is not influenced by defects present in the substrate, a good agreement with the simulation can be reached.

Effects of Annealing Treatments on the Properties of Al/Ti/p-GaN Interfaces for Normally OFF p-GaN HEMTs

This paper reports on the behavior of Al/Ti/ p-GaN interfaces as gate contacts for p-GaN/AlGaN/GaN normally off high electron mobility transistor (HEMTs), highlighting the impact of the thermal budget on the metal gate on the device characteristics. In fact, while the devices subjected to an annealing at 800°C show a considerable high leakage current, those with nonannealed Al/Ti gate contacts exhibit a normally off behavior, with a pinch-off voltage Vpo = +1.1 V and an on/off current ratio of 3 × 108. Temperature-dependent electrical measurements on back-to-back Schottky diodes allowed to determine a Schottky barrier height ΦB of 2.08 and 1.60 eV, for the nonannealed and 800°C annealed gate contacts, respectively. Hence, the increase in the leakage current observed upon annealing at 800°C was attributed to the lowering of the Schottky barrier height ΦB of the metal gate. The interfacial structural characterization explained the barrier lowering induced by the annealing. This scenario was discussed through the simulated band diagram of the heterostructures, considering the experimental values of ΦB. These results provide useful information for the device makers to optimize the fabrication flow of normally off HEMTs with p-GaN gate.

Epitaxial Layers Grown with HCl Addition: A Comparison with the Standard Process

The growth rate of 4H-SiC epi layers has been increased by a factor 3 (up to 18μm/h) with respect to the standard process with the introduction of HCl in the deposition chamber. The epitaxial layers grown with the addition of HCl have been characterized by electrical, optical and structural characterization methods. An optimized process without the addition of HCl is reported for comparison. The Schottky diodes, manufactured on the epitaxial layer grown with the addition of HCl at 1600 °C, have electrical characteristics comparable with the standard epitaxial process with the advantage of an epitaxial growth rate three times higher.

SiC-4H Epitaxial Layer Growth by Trichlorosilane (TCS) as Silicon Precursor at Very High Growth Rate

The growth rate of 4H-SiC epi layers has been increased up to 100 µm/h with the use of trichlorosilane instead of silane as silicon precursor. The epitaxial layers grown with this process have been characterized by electrical, optical and structural characterization methods. Schottky diodes, manufactured on the epitaxial layer grown with trichlorosilane at 1600 °C, have higher yield and lower defect density in comparison to diodes realized on epilayers grown with the standard epitaxial process.

Interface Electrical Properties of Al2O3 Thin Films on Graphene Obtained by Atomic Layer Deposition with an in Situ Seedlike Layer

High-quality thin insulating films on graphene (Gr) are essential for field-effect transistors (FETs) and other electronics applications of this material. Atomic layer deposition (ALD) is the method of choice to deposit high-κ dielectrics with excellent thickness uniformity and conformal coverage. However, to start the growth on the sp2 Gr surface, a chemical prefunctionalization or the physical deposition of a seed layer are required, which can effect, to some extent, the electrical properties of Gr. In this paper, we report a detailed morphological, structural, and electrical investigation of Al2O3 thin films grown by a two-steps ALD process on a large area Gr membrane residing on an Al2O3-Si substrate. This process consists of the H2O-activated deposition of a Al2O3 seed layer a few nanometers in thickness, performed in situ at 100 °C, followed by ALD thermal growth of Al2O3 at 250 °C. The optimization of the low-temperature seed layer allowed us to obtain a uniform, conformal, and pinhole-free Al2O3 film on Gr by the second ALD step. Nanoscale-resolution mapping of the current through the dielectric by conductive atomic force microscopy (CAFM) demonstrated an excellent laterally uniformity of the film. Raman spectroscopy measurements indicated that the ALD process does not introduce defects in Gr, whereas it produces a partial compensation of Gr unintentional p-type doping, as confirmed by the increase of Gr sheet resistance (from ∼300 Ω/sq in pristine Gr to ∼1100 Ω/sq after Al2O3 deposition). Analysis of the transfer characteristics of Gr field-effect transistors (GFETs) allowed us to evaluate the relative dielectric permittivity (ε = 7.45) and the breakdown electric field (EBD = 7.4 MV/cm) of the Al2O3 film as well as the transconductance and the holes field-effect mobility (∼1200 cm2 V-1 s-1). A special focus has been given to the electrical characterization of the Al2O3-Gr interface by the analysis of high frequency capacitance-voltage measurements, which allowed us to elucidate the charge trapping and detrapping phenomena due to near-interface and interface oxide traps.