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Dive into the research topics where San-Jeow Cheng is active.

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Featured researches published by San-Jeow Cheng.


IEEE Transactions on Microwave Theory and Techniques | 2012

A 50-Mb/s CMOS QPSK/O-QPSK Transmitter Employing Injection Locking for Direct Modulation

Shengxi Diao; Yuanjin Zheng; Yuan Gao; San-Jeow Cheng; Xiaojun Yuan; Minkyu Je; Chun-Huat Heng

A 50-Mb/s quadrature phase-shift keying (QPSK)/offset quadrature phase-shift keying (O-QPSK) transmitter suitable for biomedical high-quality imaging application is presented. Centered at 915 MHz, the phase modulation is achieved by directly modifying the self-resonant frequency of an LC voltage-controlled oscillator through capacitor bank switching. By eliminating many unnecessary building blocks in the conventional QPSK/O-QPSK transmitter, significant power and area savings are achieved. Implemented in 0.18- μm CMOS technology, it occupies an active core area of 0.28 mm2. With 305-MHz injection frequency and consuming 5.6 mW under 1.4-V supply, the transmitter achieves error vector magnitude (EVM) of 11.4%/5.97% for O-QPSK/QPSK modulation while delivering output power of -3 dBm at 50 Mb/s. By lowering the injection frequency to 101.67 MHz, it consumes 5.88 mW under the same supply voltages while delivering an output power of -3.3 dBm. The transmitter achieves measured EVM of 6.4% at 50 Mb/s under QPSK modulation.


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2012

A Self-Powered Power Conditioning IC for Piezoelectric Energy Harvesting From Short-Duration Vibrations

I. M. Darmayuda; Yuan Gao; Meng Tong Tan; San-Jeow Cheng; Yuanjin Zheng; Minkyu Je; Chun-Huat Heng

This brief presents a piezoelectric vibration power conditioning integrated circuit for energy autonomous sensor applications. The proposed circuit includes a negative voltage converter, a noninverting buck-boost converter working in discontinuous conduction mode (DCM), and a switching clock generator. Optimum load resistance is synthesized by the DCM buck-boost converter to achieve maximum power extraction, and system conduction loss is reduced by a novel arrangement of a current rectification diode within the buck-boost converter. This circuit is able to harness power from short-duration vibration and self starts up with a minimum 0.9-V input voltage. The proposed circuit has been implemented in a standard 0.18-μm CMOS process with 0.05-mm2 active area and achieved a maximum power conversion efficiency value of 54%.


international solid-state circuits conference | 2013

A 110pJ/b multichannel FSK/GMSK/QPSK/p/4-DQPSK transmitter with phase-interpolated dual-injection DLL-based synthesizer employing hybrid FIR

San-Jeow Cheng; Yuan Gao; Wei-Da Toh; Yuanjin Zheng; Minkyu Je; Chun-Huat Heng

The IEEE 802.15.6 Wireless Body-Area-Network (WBAN) standard has recently specified narrowband (NB) PHY covering GMSK and D-PSK modulations targeted at varying data rates [1]. There are also reported energy efficient FSK or QPSK transmitters for biomedical applications [2,3]. Hence, a reconfigurable TX that can support multichannel and multimodulation with reconfigurable data rate, spectrum and energy efficiency would be desirable. Although a conventional mixer-based or fractional-N-PLL-based TX with two-point modulation [4] can achieve the aim, the need of power hungry blocks and sophisticated calibration does not lead to power-efficient solutions. On the other hand, energy efficient injection-locked FSK or QPSK TX with good noise performance does not provide multichannel support due to the use of fixed references [2-3]. Energy efficient FSK TXs [5] with open-loop VCO have also been reported. However, they exhibit poor spectrum efficiency and do not support PSK modulation due to the poor phase noise of free-running VCOs.


IEEE Journal of Solid-state Circuits | 2010

50–250 MHz ΔΣ DLL for Clock Synchronization

San-Jeow Cheng; Lin Qiu; Yuanjin Zheng; Chun-Huat Heng

A ΔΣ DLL targeted for clock synchronization has been proposed. Unlike other existing ΔΣ DLL designs, the proposed DLL makes use of the ΔΣ dithering in the feedback path rather than at the input, which eliminates the need of additional multi-phase generator, and hence simplifies the architecture and improves the jitter performance. It also employs a second order adaptive filter to achieve dynamic loop bandwidth control for different operating frequencies as well as a unique antiharmonic detector to avoid false locking. Clock synchronization is achieved in two steps. During the coarse tuning step, the delay edge from DLL that closely matched to the incoming clock is first determined. In subsequent fine tuning step, a successive approximation method is then employed to quickly shift the selected delay edge to achieve synchronization with the incoming clock. Fabricated in 0.35 μ m CMOS technology, the ΔΣ DLL core can operate from 50 to 250 MHz with a delay step resolution of 15 ps and occupy only 0.4 mm2. It draws about 6.9 mA from 3 V supply at 200 MHz and exhibits an rms jitter of 2.1 ps.


IEEE Journal of Solid-state Circuits | 2013

An Asymmetrical QPSK/OOK Transceiver SoC and 15:1 JPEG Encoder IC for Multifunction Wireless Capsule Endoscopy

Yuan Gao; San-Jeow Cheng; Wei-Da Toh; Y.s. Kwok; Kay-Chuan Benny Tan; Xi Chen; Wai-Meng Mok; Htun-Htun Win; Bin Zhao; Shengxi Diao; Alper Cabuk; Yuanjin Zheng; Sumei Sun; Minkyu Je; Chun-Huat Heng

This paper presents a chipset including an asymmetrical QPSK/OOK transceiver SoC and a JPEG image encoder for wireless capsule endoscopy. The transceiver SoC supports bi-directional telemetry for high data-rate image transmission with QPSK modulation and low data-rate command link with OOK modulation. A low power JPEG encoder is designed to compress raw image data with compression ratio as high as 15:1 using sub-sampling technique in YUV color plane. Implemented in 0.18 μm CMOS, the QPSK TX consumes 5 mW at -6 dBm of output power with 3 Mb/s data rate while the OOK RX achieves -65 dBm of sensitivity at 500 kb/s data rate with 4.5 mW power consumption. A prototype capsule has been implemented with the chipset and the performance has been verified with in vivo animal experiment. With duty cycling, the average power consumption of TX is 2.5 mW when transmitting at 3 fps frame rate.


asian solid state circuits conference | 2014

A 103 pJ/bit multi-channel reconfigurable GMSK/PSK/16-QAM transmitter with band-shaping

Xiayun Liu; Teng Kok Hin; Chun-Huat Heng; Yuan Gao; Wei-Da Toh; San-Jeow Cheng; Minkyu Je

A 401~406MHz GMSK/PSK/16-QAM TX with band-shaping is realized in 65nm CMOS occupying area of 0.4mm2. Coupled DLL based phase interpolated synthesizer with injection-locked ring oscillator, we achieve frequency tuning and multi-phase output without any need of phase calibration. Through direct quadrature modulation at digital PA, the TX achieves less than 6% EVM for data rate up to 12.5Mb/s. The band-shaping maximizes spectral efficiency with ACPR of -33dB. Consuming 2.57mW, the TX achieves energy efficiency of 103pJ/bit.


asian solid state circuits conference | 2012

An asymmetrical QPSK/OOK transceiver SoC and 15:1 JPEG encoder IC for multifunction wireless capsule endoscopy

Yuan Gao; San-Jeow Cheng; Wei-Da Toh; Yuen Sam Kwok; Kay-Chuan Benny Tan; Xi Chen; Wai-Meng Mok; Htun Htun Win; Bin Zhao; Shengxi Diao; Cabuk Alper; Yuanjin Zheng; Sumei Sun; Minkyu Je; Chun-Huat Heng

A chipset including a low power asymmetrical QPSK/OOK transceiver SoC and a 15:1 JPEG image encoder IC is presented for wireless capsule endoscopy. The proposed asymmetrical bi-directional telemetry link supports high-data-rate image transmission with QPSK modulation and low-data-rate actuator control data reception with OOK modulation. To transmit high-quality images with high spectral efficiency, a low power JPEG encoder with compression ratio as high as 15:1 is employed to compress raw image data with subsampling technique in YUV color plane. Implemented in 0.18-μm CMOS, the QPSK TX consumes 5 mW at -6 dBm of output power with 3Mb/s data rate while the OOK RX achieves -60 dBm of sensitivity at 500-kb/s data rate with 6-mW power consumption. A prototype capsule system has been implemented for wireless endoscopy using the developed chipset. With duty cycling, the average power consumption of TX is 2.5 mW when transmitting at 3-fps frame rate.


asian solid state circuits conference | 2013

An energy-autonomous piezoelectric energy harvester interface circuit with 0.3V startup voltage

Yuan Gao; Darmayuda I. Made; San-Jeow Cheng; Minkyu Je; Chun-Huat Heng

A high efficiency energy-autonomous interface circuit for piezoelectric energy harvester is presented in this paper. The proposed circuit includes a negative voltage converter (NVC) with dynamic body bias control, a reconfigurable switching converter working in discontinuous conduction mode (DCM) and a clock generator. The body biasing circuit provides dynamic forward body bias control to enhance NVC conversion efficiency in low input voltage range and reduce substrate leakage under high input voltage range. A reconfigurable switching converter in DCM boost/buck-boost modes provides synthesized resistive input impedance for power matching and voltage step-up. Implemented in a standard 65nm CMOS process, the proposed system has a measured cold startup voltage of 0.3V with a maximum conversion efficiency of 70%.


radio frequency integrated circuits symposium | 2009

1.1 to 1.9GHz CMOS VCO for tuner application with resistively tuned variable inductor

San-Jeow Cheng; Yuanjin Zheng; Chun-Huat Heng

A VCO is fabricated in 0.35µm CMOS technology for tuner application as a proof of concept for a novel method of resistively tuning the inductance of an LC VCO. By employing a transformer as inductor, L is varied by changing the secondary coil current using active resistors. This eliminates the need for using multiple inductors to cover the frequency spectrum of 1.1 to 1.9GHz, resulting in large savings in area. Power consumption is comparable to other known transformer based, magnetic tuning inductance methods due to its single powered VCO core implementation. It draws about 6.8mA from a 3V supply. The achievable tuning range of 1.06 to 1.88GHz (56%) and phase noise of −116.1dBc/Hz is adequate for tuner application.


ieee international wireless symposium | 2013

Energy efficient transmitters for high data rate biomedical applications

Chun-Huat Heng; Yuan Gao; Mehran M. Izad; Shengxi Diao; San-Jeow Cheng; Yuanjin Zheng; Minkyu Je

In this paper, we examine techniques to achieve both spectrum and energy efficient transmitters, targeting for high data rate biomedical applications. These applications benefit from asymmetric data link, where energy efficient high data rate transmitter and low data rate receiver are usually integrated. Injection locking LC oscillator and ring oscillator are employed here to achieve efficient PSK modulation. QPSK/O-QPSK/8PSK modulation with EVM of 6.4%/4.5%/3.8% have been demonstrated at data rate of 10Mbps~90Mbps with the lowest reported energy efficiency of 118pJ/bit and 17pJ/bit. Due to the architectural simplification, only active area of 0.28mm2 and 0.038mm2 are required for the transmitters.

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Chun-Huat Heng

National University of Singapore

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Yuanjin Zheng

Nanyang Technological University

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Shengxi Diao

University of Science and Technology of China

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Lin Qiu

National University of Singapore

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