Sanka Ganesan

No-fault-found and intermittent failures in electronic products

This paper reviews the possible causes and effects for no-fault-found observations and intermittent failures in electronic products and summarizes them into cause and effect diagrams. Several types of intermittent hardware failures of electronic assemblies are investigated, and their characteristics and mechanisms are explored. One solder joint intermittent failure case study is presented. The paper then discusses when no-fault-found observations should be considered as failures. Guidelines for assessment of intermittent failures are then provided in the discussion and conclusions.

Lead-free Electronics: Ganesan/Lead

Preface. Editors. Contributors. Acknowledgements. Chapter 1. Lead-Free Electronics: Overview. Chapter 2. Lead-Free Legislations, Exemptions & Compliance. Chapter 3. Lead-Free Alloys: Overview. Chapter 4. Lead-Free Manufacturing. Chapter 5. Review of Lead-Free Solder Joint Reliability. Chapter 6. Constitutive Properties and Durability of Selected Lead-Free Solders. Chapter 7. Interfacial Reactions and Performance of Lead-Free Solder Joints. Chapter 8. Conductive Adhesives. Chapter 9. Component-Level Issues in Lead-Free Electronics. Chapter 10. Tin Whiskers in Electronics. Chapter 11. Lead-Free Separable Contacts and Connectors. Chapter 12 Intellectural Property. Chapter 13. Costs to Lead-Free Migration. Chapter 14. Lead-Free Technologies in the Japanese Electronics Industry. Chapter 15. Guidelines for Implementing Lead-Free Electronics. Index.

Are you ready for lead-free electronics?

An expedient transition to lead-free electronics has become necessary for most electronics industry sectors, considering the European directives [The Waste of Electrical and Electronic Equipment (WEEE) directive requires manufacturers to reduce the disposal waste of electrical and electronic products by reuse, recycling, and other forms of recovery. The Restriction of the Use of Certain Hazardous Substances in Electrical and Electronic Equipment (RoHS) legislation restricts the use of lead, as well as cadmium, mercury, hexavalent chromium, and two halide-containing flame retardants, namely polybrominated biphenyls (PBB) and polybrominated diphenyl ethers (PBDE), in eight of the ten product categories identified in the WEEE directive. Unlike for WEEE, whereby EU member states are free to set more severe national legislation satisfying the WEEE directive requirements, RoHS is a single market directive. Both the WEEE and RoHS directives will become effective on July 1, 2006] , other possible legislative requirements, and market forces , . In fact, the consequences of not meeting the European July 2006 deadline for transition to lead-free electronics may translate into global market losses. Considering that lead-based electronics have been in use for over 40 years, the adoption of lead-free technology represents a dramatic change. The industry is being asked to adopt different electronic soldering materials , component termination metallurgies, and printed circuit board finishes. This challenge is accompanied by the need to requalify component-board assembly and rework processes, as well as implement test, inspection, and documentation procedures. In addition, lead-free technology is associated with increased materials, design, and manufacturing costs. [The cost of implementing the RoHS directive in the EU has been estimated to be US

Tin whiskering risk factors

20Bn . Intel Corporations efforts to remove lead from its chips have been estimated to cost the company over US

Effects of Printed Circuit Board Materials on Lead-free Interconnect Durability

100 million so far]. The use of lead-free materials and processes has also prompted new reliability concerns , as a result of different alloy metallurgies and higher assembly process temperatures relative to tin-lead soldering. This paper provides guidance to efficiently implement the lead-free transition process that accounts for the companys market share, associated exemptions, technological feasibility, product reliability requirements, and cost. Lead-free compliance, part and supplier selection, manufacturing, and education and training are addressed. The guidance is presented in the form of answers to key questions.

Assessment of Thermomechanical Damage of Electronic Parts Due to Solder Dipping as a Postmanufacturing Process

Whiskers are elongated single crystals of pure tin that have been reported to grow to more than 10 mm (250 mils) in length (though they are more typically 1 mm or less) and from 0.3 to 10 /spl mu/m. in diameter typical 1-3 /spl mu/m). Whiskers grow spontaneously without an applied electric field or moisture (unlike dendrites) and independent of atmospheric pressure (they grow in vacuum). Whiskers may be straight, kinked, hooked, or forked and some are reported to be hollow. Their outer surfaces are usually striated. Whiskers can grow in nonfilament types which are sometimes called lumps or flowers. Whisker growth may begin soon after plating. However, initiation of growth may also take years. The unpredictable nature of whisker incubation and subsequent growth is of particular concern to systems requiring long term, reliable operation.

Accelerated testing and finite element analysis of PBGA under multiple environmental loadings

This study investigates the effects of printed circuit board (PCB) material on interconnect durability of lead free assemblies. The assemblies involve soldering various packages (array and peripheral) on to FR4, high glass transition temperature (Tg) FR4 and Polyimide (PI) printed circuit boards using Sn3Ag0.5Cu solder alloy. The glass transition temperature of these materials ranges from 130°C to 230°C. Thermomechanical properties, such as elastic modulus and thermal expansion coefficients, of the board materials vary considerably. These properties have a direct impact on the interconnect durability. In this paper, thermomechanical properties are experimentally determined and used for solder joint durability simulation. Two kinds of environmental loadings are simulated: temperature cycling and random vibration loading. The results show that PI board provides a better solder joint durability than FR4 and high TgFR4 under temperature cycling conditions. PI assembly has better durability than FR4 assembly under random vibration. The paper also presents the effect of temperature on the vibration response of the FR4 printed circuit board assemblies. The understanding of these changes can contribute to the study on interconnect durability under combined temperature cycling and vibration loading conditions.

Reliability Assessment on Insertion Mount Assembly under Vibration Conditions

Tin whiskering is a concern with tin-rich alloy finishes on electronic part terminations. Solder dipping may be used to replace the original finish with eutectic tin-lead solder for tin-whiskering risk mitigation purposes. However, the solder dipping process may expose electronic parts to thermomechanical damage within the package due to the thermal refinishing profile used during dipping. This paper discusses solder dipping as a refinishing technique and the associated risks from thermomechanical damage. An experimental study was used to assess the possibility of thermomechanical damage on various electronic part-types of different package configurations. Package and die geometries were characterized for all part-types to develop quantitative metrics, which may be used by electronic part users to assess parts for their susceptibility to thermomechanical damage.

Chip-on-Board (CoB) technology for low temperature environments. Part I: Wire profile modeling in unencapsulated chips

To investigate the long term reliability of plastic ball grid array (PBGA) packages in aerospace applications, accelerated tests were conducted to non-underfilled and underfilled packages under multiple environmental loadings at board level. This paper discusses the test results and the underfill effect on solder joint reliability. Failure modes and sites were identified through failure analysis on test samples. To better understand the thermomechanical behavior of PBGAs under cyclic thermal loading environments, three dimensional FEA models for non-underfilled and underfilled packages were also developed and used to predict the time to failure.

Using cut-out features for efficient printed circuit board testing and failure analysis

This paper presents the reliability design-of-experiment and results for an insertion-mount assembly under random vibration loading conditions. The natural frequency and overstress limits were first identified for the test vehicle. The durability of assemblies with Sn37Pb (SnPb) and Sn3.0Ag0.5Cu (SAC) solder joints was compared under aging conditions that vary on temperature and duration: 125degC for 100 hours, 125degC for 350 hours, -55degC for 1000 hours. The effects of aging and printed circuit board pad finishes on solder joint reliability were also investigated. The results show that SnPb solder joints have better performance than SAC solder joints, especially under high-vibration loading conditions and with thermal aging treatment. Pad finishes were also found to contribute to diffusion in assembly reliability but with different trends for differently aged products.