Santanu Kapat

A Current-Controlled Tristate Boost Converter With Improved Performance Through RHP Zero Elimination

A novel current mode control scheme for the tristate boost converter circuit is proposed, which eliminates the zero in the right-half plane (RHP), and improves the dynamic performance. The tristate boost converter contains an additional switch across the inductor. Within a clock cycle, the inductor current first rises during the on interval of the main switch, then falls during the off or capacitor charging interval, and finally, remains almost constant during the freewheeling interval when the additional switch is turned on. In the proposed controller, the peak value of the inductor current is controlled by peak current mode control using an outer voltage feedback loop, whereas the freewheeling current is controlled by the input voltage and the reference voltage feedforward path. Applying both feedback as well as feedforward control on the inductor current significantly improves the output voltage regulation, audio susceptibility, and transient responses. We show that the RHP zero is completely eliminated from the closed-loop control-to-output transfer function. This results in a very large bandwidth, and hence a superior dynamic performance. The latter is established by comparison with the voltage-mode- and current-mode-controlled classical boost converters that suffer from the RHP zero problem, as well as with other tristate boost converter control techniques like the constant charging interval and dual mode control, recently proposed in the literature. Significant superiority of the proposed scheme is established both through simulation and experimentation.

Discontinuous Map Analysis of a DC-DC Converter Governed by Pulse Skipping Modulation

This paper reports the bifurcation phenomena in a dc-dc converter governed by a pulse skipping modulation (PSM) scheme, which is normally used to improve efficiency under light load condition. It is shown that the discrete-time model of the system takes the form of a discontinuous map, where the discrete-time state space is piecewise smooth, divided into five regions, each with a different functional form and separated by four borderlines. One additional borderline is considered to identify an infeasible region during a PSM operation. For a restricted operating region, we show that the system is described by a one-dimensional discontinuous map; otherwise it is a combination 1-D and 2-D forms. We derive the conditions for the existence and stability of different periodic orbits. We observe a period-adding cascade in which the periodicity varies non-monotonically exhibiting abrupt changes in the spectral composition for a smooth parameter variation. The proposed method may be useful for modeling and analysis of other dc-dc converter topologies governed by a PSM operation.

Formulation of PID Control for DC–DC Converters Based on Capacitor Current: A Geometric Context

The output voltage derivative term associated with a PID controller injects significant noise in a dc-dc converter. This is mainly due to the parasitic resistance and inductance of the output capacitor. Particularly, during a large-signal transient, noise injection significantly degrades phase margin. Although noise characteristics can be improved by reducing the cutoff frequency of the low-pass filter associated with the voltage derivative, this degrades the closed-loop bandwidth. A formulation of a PID controller is introduced to replace the output voltage derivative with information about the capacitor current, thus reducing noise injection. It is shown that this formulation preserves the fundamental principle of a PID controller and incorporates a load current feedforward, as well as inductor current dynamics. This can be helpful to further improve bandwidth and phase margin. The proposed method is shown to be equivalent to a voltage-mode-controlled buck converter and a current-mode-controlled boost converter with a PID controller in the voltage feedback loop. A buck converter prototype is tested, and the proposed algorithm is implemented using a field-programmable gate array.

Improved Time Optimal Control of a Buck Converter Based on Capacitor Current

Time optimal control (TOC) is a technique to provide fast transient recovery in dc-dc converters. Prior published approaches are incomplete in the formulation of TOC because they ignore voltage-deviation effects on inductor-current and load-current dynamics during a large-signal recovery. An accurate TOC algorithm based on capacitor current is presented. This method achieves minimum transient recovery time for load transients and tracking in a buck converter. The minimum recovery time is preserved even with a transient-detection delay. This control configuration ensures large-signal stability in a sense similar to that of sliding-mode control. The results are demonstrated in an experimental buck converter that uses a digital control algorithm.

Beyond time-optimality: Energy-based control of augmented buck converters for near ideal load transient response

This paper presents a buck converter augmented with additional energy paths that enable a near null response to load transients. Fundamental performance limits, such as slew-rate limits, are overcome resulting in increased bandwidth with a response that is faster than previously established “minimum time” or “time optimal” control of conventional buck converters. An energy-based method is presented that allows simplified control of the augmentation branches. An efficiency analysis shows that power loss is dependent on load step size and frequency. Experimental results for a 12 V input, 5 V output, 25 W buck converter demonstrate that for 60 percent load steps the augmented converter has half the settling time, four times less peak-to-peak voltage deviation, and no inductor current overshoot as compared to the minimum time response.

Achieving Monotonic Variation of Spectral Composition in DC–DC Converters Using Pulse Skipping Modulation

This paper presents a new type of pulse skipping modulation (PSM) in a dc-dc converter, which is controlled by a voltage mode scheme. The duty ratio of the pulses, instead of being constant as in the conventional PSM, is controlled using a voltage mode control scheme along with a feed-forward path of the input voltage and an adjustable voltage. In the conventional PSM, spectral composition varies nonmonotonically which results in problems due to electromagnetic interference (EMI). We show, both analytically and experimentally, that the proposed scheme results in monotonic spectral behavior for a wide range of input voltage and load resistance. Hence one can obtain the small signal model of the system. Because of the synchronism with the external clock, it facilitates the design of an input filter for reduction of EMI.

A novel current controlled tri-state boost converter with superior dynamic performance

A novel current mode control of tri-state boost converter is proposed, which eliminates the zero in the right- half plane and improves the dynamic performance. The tri- state boost converter contains an additional switch across the inductor. Within a clock cycle, the inductor current first rises during the on interval of the main switch, then falls during the off or capacitor charging interval, and finally remains constant during the freewheeling interval when the second switch is turned on. In the proposed controller, the peak value of the inductor current is controlled by peak current mode control whereas the freewheeling current is dependent on the reference voltage. The direct control of the inductor current results in a larger bandwidth due to the fast inner loop and thereby a superior dynamic performance is obtained. The latter is established by comparison with that of voltage mode and current mode controlled classical boost converters which suffer from the RHP zero problem, as well as with other tri-state boost converter control techniques like the constant charging interval and dual mode control.

Nonlinear Analysis of Discretization Effects in a Digital Current Mode Controlled Boost Converter

Digital current mode control finds wide spread application in point of load power converters in DC nano-grid because of its technical benefits. However, finite current-loop sampling effects introduce undesirable sub-harmonic oscillations. This paper presents an analytical framework to investigate such nonlinear phenomena in a digitally current mode controlled boost converter. Discrete-time models for multi-sampled current loops and uniform sample with compensating ramp are derived under continuous conduction mode. We show that the discrete-time maps for such systems are discontinuous in nature. While the error voltage using a proportional-integral controller stays within the zero-error-bin (ZEB), the reference current becomes constant and 1-D maps of the inner current-loop can be used for stability analysis. Uniform sampling may lead to chaos, period doubling or stable period-1 behavior depending on slope of the compensating ramp. Multi-sampled current loop imposes several borders in the discrete parameter space and may eventually lead to high periodic behavior. In a counter-based compensating ramp, staircase effects may lead to sub-harmonic oscillation. Such instability eventually brings the error voltage outside the ZEB and 2-D map models have to be used for further investigating the nonlinear phenomena. A boost converter prototype was made. Digital current mode control is realized using an FPGA device. Test results demonstrate close agreement with the analysis.

Null response to a large signal transient in an augmented dc-dc converter: A geometric approach

The maximum closed-loop bandwidth of a dc-dc converter is restricted to a fraction of its switching frequency, while governed by a conventional pulse-width-modulation (PWM) technique. Even an advanced geometric control is limited by its internal slew rate. The bandwidth can be made close to (even higher than) the switching frequency through converter augmentation; however, it requires a proper control algorithm and circuit arrangements. This paper considers methods of controlling both augmented buck and boost converters. An augmented boost converter topology is also proposed. The main switch is controlled through fixed-frequency PWM control, and augmented switches are controlled through a bang-bang control. The open-loop small-signal analysis is carried out using a frequency domain approach. Minimum-time transient recovery is achieved using a finite set of augmented resistances and dynamically varying voltage hysteresis bands. It is possible to achieve null response in the sense of ripple band to the large-signal transient.

PID controller tuning in a DC-DC converter: A geometric approach for minimum transient recovery time

A high performance proportional-integral-derivative (PID) controller in a dc-dc converter requires a time optimal tuning rule. A suitable auto-tuning rule needs to perform large-signal minimum-time transient recovery, while maintaining a sufficient small-signal stability margin and closed-loop bandwidth. This paper applies a geometric approach to analytically formulate a time optimal PID controller tuning rule for a buck converter. It is shown that the proposed method achieves approximate minimum-time transient recovery in the large-signal sense. The controller gains during a small-signal transient can be shown to be representative of those obtained using a standard tuning rule. The proposed formulation closely follows the desired minimum-transient-time trajectory. This geometric representation ensures large-signal stability in a sense similar to that of sliding mode control. A buck converter prototype is tested, and the proposed scheme is implemented using the ALTERA FPGA Cyclone-II.