Santiago Delgado

Using virtualization to reduce the cost of test

Virtualization is a technology that enables running two or more operating systems simultaneously on a single computer. This paper will explain how virtualization software operates, compare the major types of virtualization software available, and explain how virtualization can reduce hardware cost in automatic test systems.

Implementing ATML into the Automatic Test System development and execution workflow

The lack of standards for automatic test information has stifled the development of more efficient and interoperable test systems to better meet next generation automatic test challenges. In response, the Naval Air Systems Command led the creation of the automatic test markup language (ATML) to standardize the exchange medium for sharing information between components of an automatic test system. ATML defines component standards that represent the components of an automatic test system (ATS), such as test results, test description and instrument description, and the interoperability between these standards. The ATML specification standardizes how components are documented but doesnpsilat elaborate on how ATS developers should use the standards in the design and execution of an ATS. This paper will propose an implementation of ATML in the ATS development and execution workflow in order to motivate the use of this standard in ATS development and generate discussion in the ATML community.

Improve design efficiency and test capabilities with HIL Simulation

Customer expectations and governmental requirements have changed the way engineers develop products. From automobiles and airplanes to industrial equipment and national defense systems, designers are adding intelligence to their products in the form of electronic controllers. A direct result of this evolution of product design; the testing complexity for these products is growing at an exponential rate. To address this challenge, many engineers have turned to a technique called hardware-in-the-loop (HIL) Simulation. HIL simulation is a test technique that allows the engineer to begin testing their electronic controller earlier in the development process and with greater flexibility compared to physical testing alone. While not a replacement for physical testing; in many situations, such as the testing of a flight control system, HIL simulation is the only viable option for development testing due to the potential consequences that may result from a failed test. In this paper, we will show how HIL simulation is being used today and discuss a general architecture for building a HIL simulator. We will also comment on many considerations that should be taken when specifying a HIL simulator.

ATML as a framework for reducing development time and maintenance of next generation test systems

Although ATML has started to gain momentum in the defense industry because of its adoption in high-profile projects (Woodward and Harris, 2006) and its implementation by ATS vendors (Gonzalez, 2006), a large segment of the automatic test community lacks in-depth knowledge of all the ATML components and how to use ATML in their own systems. Furthermore, for ATML to deliver on the productivity gains it proposes, ATML must be adopted beyond the defense industry. This article is an introduction to ATML, its subcomponents, and how it is being used in automatic test software development. In particular, this article focuses on how ATML can facilitate information exchange, expand interoperability of test systems, and increase ATS component documentation. The article describes the eight schemas that make up ATML and focuses on the test description and test results schemas to demonstrate how ATSs can use these components.

Next-Generation Techniques for Tracking Design Requirements Coverage in Automatic Test Software Development

The increase in complexity of engineering projects, stronger competition and the need to reduce product lifecycles has led to the increased use of formalized In order to help trace relationships and store information, requirements and traceability applications were developed. Tracing and managing requirements can include many hidden costs that in some cases outweigh the benefits offered by requirements traceability. This technical document discusses a method that reduces the amount of resources and time necessary to trace requirements by including requirements coverage information in the software where requirements will be implemented. It also emphasizes the importance of easy-to-use graphical tools to specify the coverage relationships between elements and analyze the traceability information between requirements, their implementation and test results.

Automatic ATML test description translation to a COTS test executive

In response to the lack of common formats for documenting automatic test information, the Naval Air Systems Command led the creation of the Automatic Test Markup Language (ATML) to standardize the documentation and reporting of automatic test information. ATML defines classes that represent automatic test system (ATS) components, such as test description, test results and instrument description, and the interoperability between classes. As an emerging standard, ATML classes have different levels of definition and adoption. One of the most adopted classes in the ATML standard is Test Description (TD). Organizations are expecting the adoption of the ATML TD standard to reduce the development and maintenance costs for test program sets (TPSs).

Parallel testing techniques for optimizing test program execution and reducing test time

Reducing test time continues to be a priority for test program developers as the complexity of next generation products and devices increases. Test program developers must provide complete test coverage while maintaining or reducing the test time of previous versions as complexity and feature concentration increases. Developers can use different techniques for reducing productspsila test times, such as running tests in parallel which reduces test time without sacrificing test coverage or quality. Other methods include decreasing test coverage by omitting certain lower priority tests or decreasing the quality of tests by only covering a subset of the ranges across which functionality is tested. This paper will discuss techniques for running tests in parallel for different test tasks and cover the factors that affect each type of taskpsilas performance.

Applying software engineering practices to produce reliable, high-quality and accurate automated test systems

Test engineers developing test systems for mission-critical applications have to prove that the test system is reliable and accurate. As a result, software engineering practices are becoming increasingly important in order to mitigate any risk of failure that could result in costly downtime, incorrect behavior, or safety failures.

Designing Modular Software Architectures for Next-Generation Heterogeneous Networked Test Systems

When developing next-generation test systems, developers face many challenges such as moving away from monolithic test systems, adding new technologies throughout the systems life cycle, reducing costs by facilitating maintenance and exploiting COTS components. This paper discusses how a modular test architecture provides a solution to these problems by emphasizing the use of modular components instead of a monolithic design. The main parts of a modular test architecture - test management software, application development environments and measurement and control services - will be discussed. Special emphasis is placed on test management and the different components that comprise it.