Sarah M. Eichfeld

Atomically thin resonant tunnel diodes built from synthetic van der Waals heterostructures

Vertical integration of two-dimensional van der Waals materials is predicted to lead to novel electronic and optical properties not found in the constituent layers. Here, we present the direct synthesis of two unique, atomically thin, multi-junction heterostructures by combining graphene with the monolayer transition-metal dichalcogenides: molybdenum disulfide (MoS2), molybdenum diselenide (MoSe2) and tungsten diselenide (WSe2). The realization of MoS2–WSe2–graphene and WSe2–MoS2–graphene heterostructures leads to resonant tunnelling in an atomically thin stack with spectrally narrow, room temperature negative differential resistance characteristics.

Highly Scalable, Atomically Thin WSe2 Grown via Metal–Organic Chemical Vapor Deposition

Tungsten diselenide (WSe2) is a two-dimensional material that is of interest for next-generation electronic and optoelectronic devices due to its direct bandgap of 1.65 eV in the monolayer form and excellent transport properties. However, technologies based on this 2D material cannot be realized without a scalable synthesis process. Here, we demonstrate the first scalable synthesis of large-area, mono and few-layer WSe2 via metal-organic chemical vapor deposition using tungsten hexacarbonyl (W(CO)6) and dimethylselenium ((CH3)2Se). In addition to being intrinsically scalable, this technique allows for the precise control of the vapor-phase chemistry, which is unobtainable using more traditional oxide vaporization routes. We show that temperature, pressure, Se:W ratio, and substrate choice have a strong impact on the ensuing atomic layer structure, with optimized conditions yielding >8 μm size domains. Raman spectroscopy, atomic force microscopy (AFM), and cross-sectional transmission electron microscopy (TEM) confirm crystalline monoto-multilayer WSe2 is achievable. Finally, TEM and vertical current/voltage transport provide evidence that a pristine van der Waals gap exists in WSe2/graphene heterostructures.

Freestanding van der Waals Heterostructures of Graphene and Transition Metal Dichalcogenides

Vertical stacking of two-dimensional (2D) crystals has recently attracted substantial interest due to unique properties and potential applications they can introduce. However, little is known about their microstructure because fabrication of the 2D heterostructures on a rigid substrate limits ones ability to directly study their atomic and chemical structures using electron microscopy. This study demonstrates a unique approach to create atomically thin freestanding van der Waals heterostructures-WSe2/graphene and MoS2/graphene-as ideal model systems to investigate the nucleation and growth mechanisms in heterostructures. In this study, we use transmission electron microscopy (TEM) imaging and diffraction to show epitaxial growth of the freestanding WSe2/graphene heterostructure, while no epitaxy is maintained in the MoS2/graphene heterostructure. Ultra-high-resolution aberration-corrected scanning transmission electron microscopy (STEM) shows growth of monolayer WSe2 and MoS2 triangles on graphene membranes and reveals their edge morphology and crystallinity. Photoluminescence measurements indicate a significant quenching of the photoluminescence response for the transition metal dichalcogenides on freestanding graphene, compared to those on a rigid substrate, such as sapphire and epitaxial graphene. Using a combination of (S)TEM imaging and electron diffraction analysis, this study also reveals the significant role of defects on the heterostructure growth. The direct growth technique applied here enables us to investigate the heterostructure nucleation and growth mechanisms at the atomic level without sample handling and transfer. Importantly, this approach can be utilized to study a wide spectrum of van der Waals heterostructures.

Vertical 2D/3D Semiconductor Heterostructures Based on Epitaxial Molybdenum Disulfide and Gallium Nitride

When designing semiconductor heterostructures, it is expected that epitaxial alignment will facilitate low-defect interfaces and efficient vertical transport. Here, we report lattice-matched epitaxial growth of molybdenum disulfide (MoS2) directly on gallium nitride (GaN), resulting in high-quality, unstrained, single-layer MoS2 with strict registry to the GaN lattice. These results present a promising path toward the implementation of high-performance electronic devices based on 2D/3D vertical heterostructures, where each of the 3D and 2D semiconductors is both a template for subsequent epitaxial growth and an active component of the device. The MoS2 monolayer triangles average 1 μm along each side, with monolayer blankets (merged triangles) exhibiting properties similar to that of single-crystal MoS2 sheets. Photoluminescence, Raman, atomic force microscopy, and X-ray photoelectron spectroscopy analyses identified monolayer MoS2 with a prominent 20-fold enhancement of photoluminescence in the center regions of larger triangles. The MoS2/GaN structures are shown to electrically conduct in the out-of-plane direction, confirming the potential of directly synthesized 2D/3D semiconductor heterostructures for vertical current flow. Finally, we estimate a MoS2/GaN contact resistivity to be less than 4 Ω·cm(2) and current spreading in the MoS2 monolayer of approximately 1 μm in diameter.

Orientation dependence of nickel silicide formation in contacts to silicon nanowires

The orientation dependence of Ni silicide phase formation in the silicidation of silicon nanowires (SiNWs) by Ni has been studied. SiNWs with a [112] growth direction contacted by Ni pads form θ-Ni2Si for annealing conditions from 350 to 700 °C for 2 min. The θ-Ni2Si has an epitaxial orientation of θ-Ni2Si[001]∥Si[111¯] and θ-Ni2Si(100)∥Si(112) with the SiNW. On the other hand, SiNWs with a [111] growth direction react with Ni pads to form NiSi2 with an epitaxial orientation of NiSi2[11¯0]∥Si[11¯0] and NiSi2(111)∥Si(111) after annealing at 450 °C for 2 min. The [111] SiNWs were also silicided at 700 °C for 2 min, forming the low-resistivity NiSi phase. The epitaxial phases identified in the reactions of Ni films with SiNWs suggest that lattice matching at both the silicide/Si growth front and the surface of the original SiNW may play a significant role in determining the first silicide segment to grow.The orientation dependence of Ni silicide phase formation in the silicidation of silicon nanowires (SiNWs) by Ni has been studied. SiNWs with a [112] growth direction contacted by Ni pads form θ-Ni2Si for annealing conditions from 350 to 700 °C for 2 min. The θ-Ni2Si has an epitaxial orientation of θ-Ni2Si[001]∥Si[111¯] and θ-Ni2Si(100)∥Si(112) with the SiNW. On the other hand, SiNWs with a [111] growth direction react with Ni pads to form NiSi2 with an epitaxial orientation of NiSi2[11¯0]∥Si[11¯0] and NiSi2(111)∥Si(111) after annealing at 450 °C for 2 min. The [111] SiNWs were also silicided at 700 °C for 2 min, forming the low-resistivity NiSi phase. The epitaxial phases identified in the reactions of Ni films with SiNWs suggest that lattice matching at both the silicide/Si growth front and the surface of the original SiNW may play a significant role in determining the first silicide segment to grow.

Oxidation of silicon nanowires for top-gated field effect transistors

The oxidation of unintentionally doped p-type silicon nanowires grown by the vapor-liquid-solid (VLS) method and their integration into top-gated field effect transistors is reported. Dry thermal oxidation of as-grown silicon nanowires with diameters ranging from 20to400nm was carried out at 700 and 900°C with or without the addition of a chlorinated gas source. The oxidation rate was strongly dependent on the as-grown nanowire diameter, with the large-diameter nanowires oxidizing up to five times faster than the smallest nanowires at 900°C. At each diameter, the addition of trichloroethane (TCA) enhanced the rate compared to oxidation in pure O2. Top-gated field effect transistors fabricated from nanowires oxidized at 700°C had significantly less hysteresis in their subthreshold properties when TCA was added, but oxidation at 900°C with or without TCA provided hysteresis-free devices with improved subthreshold slope. Such enhancements in the electrical properties are expected based on advances in planar ...

Nickel and nickel silicide Schottky barrier contacts to n-type silicon nanowires

Schottky contacts to n-type silicon nanowires were fabricated using Ni or nickel silicide contacts in a wraparound or end contact geometry, respectively. Series resistance in the test structures was reduced by heavily doping the opposite end of the silicon nanowire, facilitating Ohmic contact formation and reducing the resistance of the nanowire itself. The effective Schottky barrier height is reported as a function of nanowire doping, ambient, and applied back gate bias, highlighting some of the important variables affecting current transport in Schottky contacts to semiconductor nanowires. For the silicide contact to the most lightly doped silicon nanowire, measurements in N2 showed that the effective barrier height without a back gate bias was 0.69 eV, and the ideality factor was 1.1.

Large-area synthesis of WSe2 from WO3 by selenium–oxygen ion exchange

Few-layer tungsten diselenide (WSe2) is attractive as a next-generation electronic material as it exhibits modest carrier mobilities and energy band gap in the visible spectra, making it appealing for photovoltaic and low-powered electronic applications. Here we demonstrate the scalable synthesis of large-area, few-layer WSe2 via replacement of oxygen in hexagonally stabilized tungsten oxide films using dimethyl selenium. Cross-sectional transmission electron microscopy reveals successful control of the final WSe2 film thickness through control of initial tungsten oxide thickness, as well as development of layered films with grain sizes up to several hundred nanometers. Raman spectroscopy and atomic force microscopy confirms high crystal uniformity of the converted WSe2, and time domain thermo-reflectance provide evidence that near record low thermal conductivity is achievable in ultra-thin WSe2 using this method.

In Situ Axially Doped n-Channel Silicon Nanowire Field-Effect Transistors

Axially doped (n+-p--n+) silicon nanowires were synthesized using the vapor-liquid-solid technique by sequentially modulating the introduction of phosphine to the inlet gas stream during growth from a silane source gas. Top-gate and wrap-around-gate metal oxide semiconductor field-effect transistors that were fabricated after thermal oxidation of the silicon nanowires operate by electron inversion of the p- body segment and have significantly higher on-state current and on-to-off state current ratios than do uniformly p- -doped nanowire field-effect devices. The effective electron mobility of the devices was estimated using a four-point top-gate structure that excludes the source and drain contact resistance and was found to follow the expected universal inversion layer mobility versus effective electric field trend. The field-effect properties of wrap-around-gate devices are less sensitive to global-back-gate bias and thus provide better electrostatic control of the nanowire channel. These results demonstrate the ability to tailor the axial doping profile of silicon nanowires for future planar and vertical nanoelectronic applications.

Resistivity measurements of intentionally and unintentionally template-grown doped silicon nanowire arrays

High density, intentionally doped silicon nanowire (SiNW) arrays were fabricated within the pores of anodic alumina (AAO) templates via gold-catalysed vapour?liquid?solid (VLS) growth using silane (SiH4) as the source gas and trimethylboron ((CH3)3B, TMB) and phosphine (PH3) as p-type and n-type dopant sources, respectively. The AAO template serves as a support structure for nanowire growth and fabrication of electrical contacts to the nanowire arrays. Nanowire array resistance was measured as a function of SiNW length for a series of samples prepared with different dopant/SiH4 inlet gas ratios. A method was developed to extract the SiNW resistivity from the measurements of array resistance versus nanowire length. The nanowire resistivity measured from the arrays decreased with increasing dopant/SiH4 ratio and compared favourably with resistivity data obtained from four-point measurements of individual SiNWs grown under identical conditions. Nominally undoped SiNWs grown in the AAO templates were found to be p-type with resistivity in the range of 1?3???cm, indicating the presence of unintentional acceptors in the wires. The resistivity of undoped SiNWs grown under identical conditions but on oxidized (100) Si substrates was much higher, of the order of 104?105???cm, suggesting that the AAO templates are the source of the acceptor impurities.