Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Saranyan Vigraham is active.

Publication


Featured researches published by Saranyan Vigraham.


IEEE Transactions on Evolutionary Computation | 2004

A family of compact genetic algorithms for intrinsic evolvable hardware

John C. Gallagher; Saranyan Vigraham; Gregory R. Kramer

For many evolvable hardware applications, small size and power efficiency are critical design considerations. One manner in which significant memory, and thus, power and space savings can be realized in a hardware-based evolutionary algorithm is to represent populations of candidate solutions as probability vectors rather than as sets of bit strings. The compact genetic algorithm (CGA) is a probability vector-based evolutionary algorithm that can be efficiently and elegantly implemented in digital hardware. Unfortunately, the CGA is a very weak, first order, evolutionary algorithm that is unlikely to possess sufficient search power to enable intrinsic evolvable hardware applications. In this paper, we further develop a number of modifications to the basic CGA that significantly improve its search efficacy without substantially increasing the size and complexity of its hardware implementation. The paper provides both benchmark results demonstrating increased efficacy and a conceptual data path/microcontroller design suitable for implementation in digital hardware. Following, it demonstrates efficient implementation by making a head-to-head comparison of field programmable gate array implementations of both the classic CGA and a member of our family of modifications. The paper concludes with a discussion of future research, including several additional extensions that we expect will further increase search efficacy without increasing implementation cost.


nasa dod conference on evolvable hardware | 2005

A case for using Minipop as the evolutionary engine in a CTRNN-EH control device: an analysis of area requirements and search efficacy

Saranyan Vigraham; John C. Gallagher

Continuous time recurrent neural network-evolvable hardware (CTRNN-EH) control devices comprise of an analog continuous time recurrent neural network (CTRNN) with an on-board evolutionary algorithm (EA) engine to evolve the parameters of the neural network. These control devices were demonstrated to be effective for suppressing thermoacoustic (TA) instability in simulated jet engines. Currently, the construction of a VLSI CTRNN-EH device is underway for suppressing TA instability in a real combustion chamber while it is in operation. In this paper, we present a fully function digital EA engine for the CTRNN-EH control device. An ad-hoc hardware design is presented to realize space savings. The simulation and synthesis results of the hardware EA are presented. In addition to this, a demonstration of the efficacy of the EA across a noisy real world control problem is presented.


genetic and evolutionary computation conference | 2005

Evolving analog controllers for correcting thermoacoustic instability in real hardware

Saranyan Vigraham; John C. Gallagher; Sanjay K. Boddhu

Previous research demonstrated that Evolvable Hardware (EH) techniques can be employed to suppress Thermoacoustic (TA) instability in a computer simulated combustion chamber. Though that work established basic feasibility, there were still significant questions concerning whether those techniques would function in the real world. This paper presents the results of the next incremental step between controlling in pure simulation and controlling a real combustion chamber. In it, we will examine issues involved with using EH methods to learn to control a hardware analog circuit model of a combustion chamber. In so doing, we establish that the basic methods work when interfaced to real hardware and uncover some interesting, potentially critical, differences between simulation and real environments. We will also establish that both the EA methods and the underlying reconfigurable hardware can be expected to learn effectively in noisy control environments and that they are well-suited for upcoming use in a live engine.


congress on evolutionary computation | 2005

A reconfigurable continuous time recurrent neural network for evolvable hardware applications

John C. Gallagher; Sanjay K. Boddhu; Saranyan Vigraham

Evolvable hardware is reconfigurable hardware plus an evolutionary algorithm. Continuous time recurrent neural networks (CTRNNs) have been proposed for use as the reconfigurable hardware component. Until recently, however, nearly all CTRNN based EH was simulation based. This poster details a design for a reconfigurable analog CTRNN computer that supports both extrinsic and intrinsic CTRNN evolvable hardware.


genetic and evolutionary computation conference | 2003

Active control of thermoacoustic instability in a model combustor with neuromorphic evolvable hardware

John C. Gallagher; Saranyan Vigraham

Continuous Time Recurrent Neural Networks (CTRNNs) have previously been proposed as an enabling paradigm for evolving analog electrical circuits to serve as controllers for physical devices [6]. Currently underway is the design of a CTRNN-EH VLSI chips that combines an evolutionary algorithm and a reconfigurable analog CTRNN into a single hardware device capable of learning control laws of physical devices. One potential application of this proposed device is the control and suppression of potentially damaging thermoacoustic instability in gas turbine engines. In this paper, we will present experimental evidence demonstrating the feasibility of CTRNN-EH chips for this application. We will compare our controller efficacy with that of a more traditional Linear Quadratic Regulator (LQR), showing that our evolved controllers consistently perform better and possess better generalization abilities. We will conclude with a discussion of the implications of our findings and plans for future work.


International Journal on Artificial Intelligence Tools | 2008

A COMMERCIAL OFF-THE-SHELF IMPLEMENTATION OF AN ANALOG NEURAL COMPUTER

Sanjay K. Boddhu; John C. Gallagher; Saranyan Vigraham

For most applications, analog electrical circuit implementations of continuous-valued neural networks have been abandoned in favor of digital simulations. This is not surprising, as both precision and accuracy can be more easily ensured in digital computers. Still, because they use far fewer transistors and support components, analog circuits can still be orders of magnitude smaller than their digital simulations. In some application, like micro-robotics and embedded control, one might be willing to tolerate less accuracy and precision for the size and power benefits. One would not under any condition, however, tolerate significant behavioral mismatches between the differential equation and electrical circuit forms of the neural networks in question. In this paper, we will present a design for an analog neural computer that embodies the commonly used continuous time recurrent neural network. We will show that the computer possesses excellent behavioral congruence to the differential equation form even in the presence of significant practical compromises. We will also discuss the implications of this work for both practical Commercial, Off-The-Shelf (COTS) and Application-Specific Integrated Circuit (ASIC) devices.


congress on evolutionary computation | 2005

A space saving digital VLSI evolutionary engine for CTRNN-EH devices

Saranyan Vigraham; John C. Gallagher

Continuous time recurrent neural network - evolvable hardware (CTRNN-EH) control devices are composed of an analog continuous time recurrent neural network (CTRNN) with an onboard evolutionary algorithm (EA) engine that evolves the parameters of the neural network. These control devices have been demonstrated to be useful in a variety of real time control applications and are amenable to mixed-signal VLSI implementation for the control applications under stringent size and power constraints. Unlike the CTRNNs, which are analog in nature, the EA engine has to be implemented using digital VLSI techniques. Because these techniques do not offer the advantages of small area and power directly, the task of adhering to size and power constraints is challenging and must be accomplished at the algorithmic level. In this paper, the authors discussed the aforementioned issues in detail and also propose a space-saving digital EA engine for the CTRNN-EH device. The EA engine has been modeled in Verilog HDL. The synthesis results are presented and the functionality of the EA is demonstrated on a small test problem.


american control conference | 2006

Mechatronics for noise control: on the capabilities of ENC

Saranyan Vigraham; John C. Gallagher

Evolvable noise controllers (ENCs) are mechatronics systems that are being designed for active noise suppression of non-periodic noises and vibrations in automotive, aeronautical and industrial applications. ENCs are special type of neuro controllers that have been repeatedly demonstrated to possess an excellent faculty for real world control applications. In this paper, ENC control devices are introduced and it will be demonstrated how they effectively suppress periodic and non-periodic noises. ENC control is applied for suppressing parasitic oscillations in a simulated turbine jet engine combustion chamber and will be compared against published traditional controllers for the same problem. The advantages of the ENC devices are discussed in detail and future implications are made


ieee international conference on evolutionary computation | 2006

A Reconfigurable Analog Neural Network for Evolvable Hardware Applications: Intrinsic Evolution and Extrinsic Verification

Sanjay K. Boddhu; John C. Gallagher; Saranyan Vigraham

Continuous time recurrent neural networks (CTRNN) have been proposed for use as reconfigurable hardware for evolvable hardware (EH) applications. Our previous work demonstrated a fully programmable hardware CTRNN using off-the-shelf components and provided verification of its utility in extrinsic EH. However, applicability for intrinsic usage was not studied. This work addresses that unanswered issue and demonstrates that configurations evolved in the hardware are behaviorally equivalent to simplified state equation models. Further, this work also provides strong similarity metrics to compare the hardwares performance with software simulated CTRNN models.


ieee international conference on evolutionary computation | 2006

CTRNN-EH in Silicon: Challenges in Realizing Configurable CTRNNs in VLSI

Saranyan Vigraham; John C. Gallagher

In prior work, continuous time recurrent neural network evolvable hardware (CTRNN-LTI) techniques were demonstrated to be effective in controlling unstable vibrations in simulated jet engine combustion chambers. Currently CTRNN-EII devices are being fabricated in VLSI for deployment in the real world. However, because of engineering constraints and difficulties in hardware, there are challenges in maintaining the high model-to-hardware fidelity that is critical before these devices are deployed. Tins paper will present these challenges in detail and provide some practical techniques that help preserve the model-to-hardware fidelity.

Collaboration


Dive into the Saranyan Vigraham's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge