Saumya Gandhi

A new approach to power integrity with thinfilm capacitors in 3D IPAC functional module

This paper presents a new active and passive integration concept called 3D IPAC (Integrated Actives and Passives) to address the power integrity in high-performance and multifunctional systems. The 3D IPAC consists of an ultra-thin glass module with through-vias and double-side integration of ultra-thin active and passive components to form functional modules. By integrating power ICs, storage capacitors and inductors, and high-frequency decoupling capacitors in ultra-thin (30-100 μm) glass substrates, 3D IPAC Voltage Regulator Module (3D IPAC VRM) provides a complete and ultra-miniaturized solution to power integrity. The ultra-thin 3D IPAC allows both actives and passives very close to each other and to the other active dies, resulting in improved performance over conventional SMDs and state-of-art IPDs for decoupling functions. The first part of the paper presents modeling results to show the benefits of the 3D IPAC module as a power integrity solution. The second part of the paper presents the fabrication and characterization of high-k thinfilm capacitors and etched aluminum film capacitors integrated on either sides of a through-via 3D IPAC glass substrate. This paper, therefore, demonstrates the integration of heterogeneous capacitors on a single ultra-thin glass substrate for the first time, and presents its benefits as a complete solution for power integrity.

A low-cost approach to high-k thinfilm decoupling capacitors on silicon and glass interposers

This paper demonstrates a novel low-cost thinfilm capacitor technology on silicon and glass interposers for decoupling in high-speed digital systems. Silicon interposers with thinfilm capacitors have been demonstrated before, but these technologies have not been widely adapted because of the high cost of platinum electrodes and their incompatibility with packaging infrastructure. Thinfilm capacitors with alternative package-compatible low-cost electrodes such as copper and nickel were unsuccessful because of the processing challenges on Si substrates that arise as a result of high inter-diffusion and film stress. A new class of solutions was explored to address the challenges on silicon interposer substrates. Glass-compatible crystallization processes were studied to achieve high capacitance densities. Nickel electrodes showed a capacitance density of 1.1 μF/cm2, 2-3× higher than those with alternative glass-compatible thinfilm capacitor technologies.

Tunable and Miniaturized RF Components with Nanocomposite and Nanolayered Dielectrics

Nanocomposite and nanolayered dielectrics provide new avenues to enhance the performance of RF and power components. They enable engineering of properties such as permeability, permittivity, frequency-and temperature-stability, and tunability, along with low loss, to miniaturize next-generation multiband RF modules that require higher functional density and improved performance. This paper demonstrates two such advances in nanodielectrics: 1.) Magnetic nanocomposites for miniaturization of antennas, metamaterials and other RF components, 2.) Nanolayered stack dielectrics for tunable RF components with temperature- and frequency-stability and low loss. The materials design, synthesis, processing and characterization to demonstrate the superior properties are presented.

Modeling, design, and demonstration of 2.5D glass interposers for 16-channel 28 Gbps signaling applications

This paper describes the modeling, design, and demonstration of high-speed differential transmission lines on a 130μm thin glass interposer with two re-distribution layers (RDL), line lengths of 1-50mm, and turn radii of 0.15-8mm for 16-channel signal transmission at 28 Gbps per channel. Next generation photonic systems such as 400 Gigabit Ethernet (400 GbE) require low power and low loss channels between photodetectors and trans-impedance amplifiers (TIA) or between laser arrays and driver ICs. Glass, with low dielectric constant and loss tangent, has higher electrical performance and channel power efficiency compared to silicon interposers. Furthermore, low surface roughness and high-dimensional stability of glass enable finer lithographic dimensions and higher interconnection density during large panel processing compared to organic interposers. Interconnection of optical and electrical ICs on 2.5D glass interposers provides the best combination of electrical and optical signal performance. For 400 GbE modules, a 16-channel bus at 28 Gbps per channel is required for communication to the backplane. Electrical modeling and simulation was performed to arrive at an appropriate design for the 16×28 Gbps I/O interface on a two-metal layer glass interposer. An ultra-thin 130μm glass interposer was fabricated using low-cost, double-side panel processing providing for a lower cost, higher performance solution compared to silicon interposers.

Novel Nanostructured Passives for RF and Power Applications: Nanopackaging with Passive Components

Miniaturization of passive components, while mounting them close to the active devices to form ultrathin high-performance power and RF modules, is a key enabler for next-generation multifunctional miniaturized systems. Traditional microscale materials do not lead to adequate enhancement in volumetric densities to miniaturize passive components as thin films or thin integrated passive devices. With these materials, component miniaturization also degrades performance metrics such as quality factor, leakage current, tolerance, and stability. Nanomaterials such as nanocomposite dielectrics and magneto-dielectrics, nanostructured electrodes, and the resulting thin-film components have the potential to address this challenge. This chapter describes the key opportunities in nanomaterials and nanostructures for power and RF passive components. The first part of this chapter describes the role of nanostructured materials for high-density capacitors and inductors in power modules. The second part of the chapter describes application of nanoscale materials as nanocomposite dielectrics and magneto-dielectrics with stable and high permeability and permittivity for miniaturized RF modules.

Nanomagnetic structures for inductive coupling and shielding in wireless charging applications

This paper presents materials modeling, design, processing, integration and characterization of a new class of nanomagnetic structures for coupling and shielding in wireless charging and power conversion applications. Wireless power transfer applications such as wireless charging, operating at 6.78 MHz, require high-performance magnetic materials for enhancing the coupling between transceiver and receiver coils as well as for suppressing electromagnetic interference (EMI) shielding. This research describes two novel magnetic structures for coupling inductors and ultra-thin EMI shields. A novel vertically aligned magnetic composite structure was demonstrated for the coupling inductor. This structure is shown to result in permeabilities of above 500 and loss tangent of 0.01, which enhances the coupling inductance by 3-5x at 6.78 MHz, and also enhances the power-transfer efficiency by 2x. The second part of this paper presents the modeling, design and fabrication of nanomagnetic structures for ultra-thin EMI shields in wireless power transfer applications. The ultra-thin EMI shields for wireless power transfer described in this research can achieve greater than 20dB attenuation at 6.78 MHz even for 3-5μm shield thickness.

Coaxial through-package-vias (TPVs) for enhancing power integrity in 3D double-side glass interposers

Double-sided 3D glass interposers and packages, with through package vias (TPV) at the same pitch as TSVs in Si, have been proposed to achieve high bandwidth between logic and memory with benefits in cost, process complexity, testability and thermal over 3D IC stacks with TSV. However, such a 3D interposer introduces power distribution network (PDN) challenges due to increased power delivery path length and plane resonances. This paper investigates the use of coaxial through-package-vias (TPVs) with high dielectric constant liners as an effective method to deliver clean power within a 3D glass package, and provides design and fabrication guidelines to achieve the PDN target impedance. The Coaxial TPV structure is simulated using electromagnetic (EM) solvers and a simplified equivalent circuit model to study via impedance and parasitics. Test vehicles with anodized tantalum oxide capacitors were fabricated in ultra-thin, 100μm thick glass interposers to demonstrate process feasibility, with a capacitance density of 5 nF/mm2. Self-impedance (Z11) of a 3D glass interposer containing the coaxial TPVs was analyzed with variations in (a) Via location, (b) Number of coaxial vias, and (c) Via capacitance and stack-up, to provide optimal PDN design guidelines. Based on the above parameters, the added decoupling vias achieved more than 30% impedance suppression over multiple resonance frequencies between 0.5-6 GHz, providing an effective and flexible PDN design method for double-side 3D glass interposers.

High-

High-k barium strontium titanate (BST) thin films were deposited onto glass substrates to demonstrate integrated capacitors for power supply in high-speed digital packages. Ferroelectric BST films were sputter deposited onto solution-derived lanthanum nickel oxide (LNO) electrodes. Zirconium oxide was studied for the first time as a barrier between glass and LNO electrodes to prevent electrode (LNO) interdiffusion into the glass substrate. The LNO and BST films were annealed in an oxygen-rich atmosphere at 650°C. A capacitance density of 20-30 nF/mm2 was obtained at an operating voltage of 3 V. Leakage currents of 1-10 nA/nF were measured up to 3 V. These properties demonstrate the potential for low-cost high-k thin-film decoupling capacitors in 2-D, 2.5-D, and 3-D glass interposers. A process to integrate and test such capacitors on glass substrates using sequential dielectric and electrode patterning is also demonstrated.

k

This paper describes ultrathin tantalum-based high volumetric-density power capacitors with low leakage properties for 1-10-MHz frequency applications. Nano dielectrics with low-defect density were grown on nanoporous tantalum anodes using the self-limiting anodization process. The fundamental mechanisms that govern the film growth and quality were investigated to provide anodization process guidelines. Conducting polymer nanoparticles were used as the cathodes. Complete filling of conducting polymer was achieved by the optimization of conducting polymer application process. Energy dispersive spectroscopy and structural SEM studies were performed to investigate the morphology and structure of the tantalum pentoxide films. The fabricated capacitor showed 0.6-0.8 μF/mm2 of capacitance density in the 1-10-MHz range, in substrate compatible ultrathin (<;75 μm) form factors. This is the highest volumetric density reported for such thin-film capacitors in a megahertz frequency range.

Thin-Film Capacitors With Conducting Oxide Electrodes on Glass Substrates for Power-Supply Applications

This paper describes an innovative scheme for integrating thinfilm tantalum (Ta) capacitors on active silicon substrates, an approach that can serve as a roadmap for the potential integration of ultra-thin high density capacitors in near future. The paper describes a new 3D concept for ultra-miniaturized, multi-functional and relatively low-cost power converter modules. The scheme consists of planar tantalum (Ta) capacitors by forming Ta2O5 (30-120 nm thick) dielectric and attaching directly to active or passive Si substrates using ultra-loss dielectrics (Zeon, ZS-100). Capacitors attached directly on Si allow for shorter interconnection length (<; 10μm) yielding lower parasitics in loop inductance and planar resistance. Reducing these parasitics results in higher switching frequency (>100 MHz) with fewer Ta capacitors on active Si. The paper focuses on capacitor fabrication of ultra-thin Ta foils (<; 5μm) and their integration on ultra-thin active Si for lowering the parasitics. Consequently, electrical characterization of the above capacitors demonstrates the fundamental electrical superiority of the 3D integrated Ta capacitors.