Scott G. Nogle

Pipelined dual port integrated circuit memory

Buffer circuit having variable output impedance

Comparison circuit utilizing a differential amplifier

Low di/dt BiCMOS output buffer with improved speed

Memory with compensation for voltage, temperature, and processing variations

ECL to CMOS translator

Address comparison in an inteagrated circuit memory having shared read global data lines

BICMOS sense circuit for sensing data during a read cycle of a memory

Bicmos logic circuit with self-boosting immunity and a method therefor

Memory using distributed data line loading