Sean Eilert

An energy-efficient VLSI architecture for pattern recognition via deep embedding of computation in SRAM

In this paper, we propose the concept of compute memory, where computation is deeply embedded into the memory (SRAM). This deep embedding enables multi-row read access and analog signal processing. Compute memory exploits the relaxed precision and linearity requirements of pattern recognition applications. System-level simulations incorporating various deterministic errors from analog signal chain demonstrates the limited accuracy of analog processing does not significantly degrade the system performance, which means the probability of pattern detection is minimally impacted. The estimated energy saving is 63 % as compared to the conventional system with standard embedded memory and parallel processing architecture, for 256×256 target image.

DataCenter 2020: Near-memory acceleration for data-oriented applications

In the years between now and 2020, we should expect continued exponential data growth [15][16]. A number of ongoing advances in storage: the transition to solid-state drives (SSDs), the scaling of NAND flash capacity, and advanced silicon packaging techniques will dramatically increase the capacity of storage subsystems over the same timeframe. This will significantly reduce the ratio of storage bandwidth to storage density. Consequently, the majority of data in 2020 will either be cold or will require near-memory acceleration to pull rich information out of the sea of big data. We argue that, increasingly over time, value lies not merely in the size of the data, but rather in what one can do with it.

Evaluation of x-ray irradiation on 65nm Multi-Level Cell NOR flash technologies

In this work, 65nm NOR flash memory is used for an evaluation of data retention and impact on cell charge based on varying levels of exposure to x-ray waves. A sample of 100 fully tested and configured units were programmed with a physical checkerboard pattern (half programmed, half erased) and exposed to conditions found in industrial x-ray stations. Readouts of the data pattern were done at various stages throughout the experiment and a comparison of cell Vt was performed on a population of worst case cells (lowest Vt on programmed cells, highest Vt on erased cells). Data was collected on a bit by bit basis and plotted as a cumulative probability function. Bakes were also performed to introduce any potential defects not seen initially as part of the exposure - and the readout data was collected for this stage as well. Results indicated there is a correlation on the amount of charge gain and loss seen based on the amount of total radiation incident upon the cells in extreme conditions.