Sebastian Maestri

Variable Sampling Period Filter PLL for Distorted Three-Phase Systems

This paper proposes a novel variable sampling period filter phase-locked loop (VSPF-PLL) for use in the general area of three-phase systems. It is based on the concept of variable sampling period, which allows to automatically adjust the sampling frequency to be NPLL times the line frequency. Conventional three-phase PLL are based on synchronous reference frames (SRFs) to estimate the phase error between the PLL and the input signals. However, SRF transform fail when the voltage waveforms are distorted. In this paper, a sliding-Goertzel-transform- based filter is used in the loop to reject disturbances, such as unbalanced voltage and harmonics. It allows to detect the positive sequence present in the systems without errors. Characteristics of VSPF-PLL, including its mathematical model as well as steady state and dynamic responses, are discussed in this paper. The method is implemented in a DSP and tested using typical disturbances, such as frequency steps, unbalances, harmonics, saturation, and line-to-ground fault. Comparative simulations are performed between the proposed VSPF-PLL and some of the most common three-phase PLL described in the literature. Advantages of the proposed system over the methods analyzed are also discussed. Structural simplicity, robustness, and harmonics rejection are other attractive features offered by the proposed system.

Frequency Adaptive PLL for Polluted Single-Phase Grids

This paper proposes a frequency adaptive phase-locked loop (PLL) for use in single-phase systems. The main objective is to obtain a reliable synchronization signal even in polluted grids, where the fundamental frequency is contaminated with harmonics, or present variations in phase, amplitude, and/or frequency. The proposed PLL is based on the concept of a variable sampling period technique, already implemented in a three-phase digital synchronization method proposed by the authors. This single-phase method allows us to automatically adjust the sampling frequency to be an integer multiple of the line frequency. In this case, the phase error is calculated just by one multiplication, thereby reducing implementation. A sliding Goertzel transform-based filter is also used in the loop to reject the undesired effects of this phase error detector and line disturbances, such as harmonics. To stabilize the loop, a controller that maximizes the bandwidth with an acceptable transient is introduced. The characteristics of the proposed single-phase PLL are described and the experimental results obtained from a DSP implementation are presented. A set of comparative simulations between the proposed PLL and some single-phase PLL described in the literature are conducted to validate the method. The advantages of the proposed system over other methods analyzed are also dealt with. The robustness of the system is verified by the experimental tests conducted as well as by the harmonic filtering properties. The system is also characterized by its simple architecture, which allows us to provide a high dynamic response with a very much reduced number of calculations.

Harmonics Measurement With a Modulated Sliding Discrete Fourier Transform Algorithm

Accurate harmonics estimation has become a key issue in power quality assessment. This paper deals with a discrete Fourier transform (DFT)-based measurement technique, which can be easily employed to accurately determine the harmonic components of a distorted signal, i.e., voltage or current. The proposed method is based on a modulated sliding DFT algorithm, which is unconditionally stable and does not accumulate errors due to finite precision representation, and a variable sampling period technique (VSPT) to achieve a frequency adaptive mechanism. It is worth noting that the VSPT changes the sampling period for a variable grid frequency condition, leading to a constant sampling frequency under steady-state conditions. The proposed method provides: 1) high degree of accuracy; 2) structural/performance robustness; and 3) frequency adaptability. Given the modular nature of the method, it is implemented on a field programmable gate array. Simulations and experimental tests are shown to verify the performance of the proposed method.

Characterization of Steady-State Current Ripple in Interleaved Power Converters Under Inductance Mismatches

Interleaved power converters are used in high-current applications due to their inherent reduction of semiconductors stress and total ripple. Ripple reduction is accomplished by a correct phase shifting, and the filtering improvement explained by the increase in the ripple frequency. However, these benefits are wasted, among other reasons, by the mismatch of the phase inductor value. As a consequence, differences in the ripple amplitude among phases are produced, leading to a total current ripple significantly greater than the ideal case, the loss of the cancellation points and the generation of the switching frequency component and its harmonics. The works dealing with this subject matter have focused on particular cases, such as a given number of phases, a specific converter topology, or a particular case of inductance mismatch, disregarding a general analytical approach. This paper proposes an analytical method to characterize the total ripple in steady state as a function of the duty cycle and the number of phases under any condition on inductance mismatch. Experimental results validate the proposed method.

Multiple-Stage Converter Topology for High-Precision High-Current Pulsed Sources

A new high-current, low-rise-time, and high-precision pulse generator is presented. The topology is based on the use of different stages, each one specific for a particular operation range in terms of power and switching frequency. This approach allows to accomplish current, voltage, and precision requirements with standard semiconductors. Moreover, the proposed topology provides an independent and flexible adjustment of the pulse parameters (rise and fall times, flat-top duration, pulse amplitude, etc.). Experimental results are provided to validate the control of the proposed topology.

Implementation of a novel synchronization method using Sliding Goertzel DFT

This work presents a synchronization method based on the implementation of a sliding-window digital-filter that uses the Goertzel algorithm. The proposed method filters the incoming power grid signal and specifies the input frequency by measuring the period of the output phase. The sampling frequency is adjusted to correct the phase errors introduced by the filter whenever variations in the frequency occur. Regardless of the magnitude of the input frequency variations, this method determines the input frequency with high accuracy.

Interleaved Current Control for Multiphase Converters With High Dynamics Mean Current Tracking

This paper presents a current control for high-power multiphase converters, where fast and precise current reference tracking is required, and limited switching frequency is present. The proposed control is based on a synchronization signal and current error comparison bands per phase. The control calculates the switching time that adjusts the phase current error zero-crossing points with the synchronization signal to control the current mean value and provide the correct phase shift among phases. The aforementioned comparison bands allow us to determine the current error slopes required to calculate the switching instants. This methodology permits the precise current reference tracking regardless the load voltage and the voltage drop in the semiconductor devices and in the series resistance of the phase inductors. Additionally, band-crossing information allows the fast detection of major changes in the current error, and the optimal system behavior decision, minimizing the transient time. Furthermore, the current control is stable in the complete duty cycle range, which is evaluated by means of a small-signal model. Experimental tests on a low-scale four-phase buck converter validate the proposal.

Digital Synchronization Method for Three Phase Systems

This article presents a digital signal processing method designed to obtain utility grid synchronism. This method is based on varying sampling frequency so as to generate sampling pulses in phase and at a frequency multiple of the main frequency. It is suitable for obtaining the reference in on-line power converters and for measuring harmonics in the utility grid. Even though it operates with a variable sampling frequency, a model in z-transform space is developed and contrasted with simulations. Design equations for a close loop controller which produces a response with no overshot are also developed herein.

Three-Phase Harmonic and Sequence Components Measurement Method Based on mSDFT and Variable Sampling Period Technique

This paper presents a three-phase harmonic and sequence components measurement method based on modulated sliding discrete Fourier transform (mSDFT) and a variable sampling period technique. The proposal allows measuring the harmonic components of a three-phase signal and computes the corresponding imbalance by estimating the instantaneous symmetrical components. In addition, an adaptive variable sampling period is used to obtain a sampling frequency multiple of the main frequency. By doing so, DFT typical errors, known as spectral leakage and picket-fence effect, are mitigated in steady state. The proposal is tested with different disturbances by simulation and experimental results. Some results obtained with a power quality monitor implemented with the proposed system are also presented. The high rejection to distortion in the electrical network, frequency adaptability, flexibility, and good performance in power quality monitor application render the proposed method a promising alternative for signal processing from the mains.

Multistructure Power Converter With H-Bridge Series Regulator Suitable for High-Current High-Precision-Pulsed Current Source

This study presents a novel multistructure power converter capable of generating high current pulses with short rise and fall times, and high precision in the flat-top. The proposed topology is based on the use of three conversion structures operated with current, voltage and switching frequency ratings in line with the different requirements of each pulse stage. In order to achieve the required precision, a switched-mode compensation structure in series with the load is used. Though this structure must handle a high load current, it is designed to deviate most of the load current to an auxiliary inductor; thus reducing the semiconductor devices requirements. Moreover, the use of this compensation strategy results in a first-order model of the circuit, which leads to an oscillation-free response during structures interconnection. This feature minimizes the required flat-top time, which in turn decreases the power losses on the load. Experimental results based on a scaled-down laboratory prototype validate the capability of the proposed topology to produce current pulses according to the specifications of high-precision applications.