Sebastiano Ravesi

Thermal stability of thin CoSi2 layers on polysilicon implanted with As, BF2, and Si

The thermal stability of thin cobalt silicide layers grown on preamorphized chemical vapor deposited silicon layers has been studied in the temperature range between 950 and 1100 °C. The morphology of the starting layers and their evolution during the thermal processes was analyzed by transmission electron microscopy, atomic force microscopy and Rutherford backscattering spectroscopy. The observed increase in sheet resistance with the annealing time has been correlated to the agglomeration process taking into account the dependence of the resistivity on film thickness and carrier mean free path. Sheet resistance measurements have been used to study the agglomeration process of CoSi2 by varying temperature and substrate doping (As, BF2, and Si implants). The process is thermally activated with an activation energy of 4.3 eV for the Si implanted samples. The BF2 implanted substrate show a higher activation energy (∼5.4 eV), while the arsenic implanted a lower one (∼3.6 eV). This difference is attributed to ...

Microscopic mechanisms of graphene electrolytic delamination from metal substrates

In this paper, hydrogen bubbling delamination of graphene (Gr) from copper using a strong electrolyte (KOH) water solution was performed, focusing on the effect of the KOH concentration (CKOH) on the Gr delamination rate. A factor of ∼10 decrease in the time required for the complete Gr delamination from Cu cathodes with the same geometry was found increasing CKOH from ∼0.05 M to ∼0.60 M. After transfer of the separated Gr membranes to SiO2 substrates by a highly reproducible thermo-compression printing method, an accurate atomic force microscopy investigation of the changes in Gr morphology as a function of CKOH was performed. Supported by these analyses, a microscopic model of the delamination process has been proposed, where a key role is played by graphene wrinkles acting as nucleation sites for H2 bubbles at the cathode perimeter. With this approach, the H2 supersaturation generated at the electrode for different electrolyte concentrations was estimated and the inverse dependence of td on CKOH was quantitatively explained. Although developed in the case of Cu, this analysis is generally valid and can be applied to describe the electrolytic delamination of graphene from several metal substrates.

Micro- and nanoscale electrical characterization of large-area graphene transferred to functional substrates

Summary Chemical vapour deposition (CVD) on catalytic metals is one of main approaches for high-quality graphene growth over large areas. However, a subsequent transfer step to an insulating substrate is required in order to use the graphene for electronic applications. This step can severely affect both the structural integrity and the electronic properties of the graphene membrane. In this paper, we investigated the morphological and electrical properties of CVD graphene transferred onto SiO2 and on a polymeric substrate (poly(ethylene-2,6-naphthalene dicarboxylate), briefly PEN), suitable for microelectronics and flexible electronics applications, respectively. The electrical properties (sheet resistance, mobility, carrier density) of the transferred graphene as well as the specific contact resistance of metal contacts onto graphene were investigated by using properly designed test patterns. While a sheet resistance R sh ≈ 1.7 kΩ/sq and a specific contact resistance ρc ≈ 15 kΩ·μm have been measured for graphene transferred onto SiO2, about 2.3× higher R sh and about 8× higher ρc values were obtained for graphene on PEN. High-resolution current mapping by torsion resonant conductive atomic force microscopy (TRCAFM) provided an insight into the nanoscale mechanisms responsible for the very high ρc in the case of graphene on PEN, showing a ca. 10× smaller “effective” area for current injection than in the case of graphene on SiO2.

Low-Temperature Annealing Combined with Laser Crystallization for Polycrystalline Silicon TFTs on Polymeric Substrate

The formation of polycrystalline Si layers on flexible plastic substrates, through plasma enhanced chemical vapor deposition and excimer laser annealing, is investigated. Combining low-temperature (300°C) annealing with laser dehydrogenation/crystallization produces good-quality polycrystalline silicon with a reduced shot density. By using optimal crystallization conditions it is possible to achieve a superlateral growth crystallization regime, with a grain size up to 1 μm, and void-free material, as confirmed by the presented structural analysis. The beneficial effect of the low-temperature thermal annealing has been related to the removal of nonbound hydrogen, as supported by the elastic recoil detection analysis and IR analysis of the samples. To validate the process, we fabricated non-self-aligned polysilicon thin-film transistors (TFTs) directly on spin-coated polyimide substrates, with a maximum processing temperature of 300°C and with a relatively low shot density ( 10 6 , a field-effect mobility up to 65 cm 2 /V s, and a threshold voltage of 7 V. These results confirmed that the developed crystallization process is suitable to fabricate polysilicon TFTs on polymeric substrates, allowing an increased process throughput.

Fiber texturing in nano-crystalline TiO2 thin films deposited at 150 °C by dc-reactive sputtering on fiber-textured [0 0 0 1] ZnO : Al substrates

TiO2 thin films were deposited at an effective surface temperature of 150 °C by dc-reactive magnetron sputtering on ZnO : Al oriented substrates having a fiber texture along the [0 0 0 1] axis, and studied by transmission electron microscopy and x-ray diffraction analyses. The substrate texturing was used to tailor the TiO2 structure in such a way that a porous matrix made of anatase nano-grains (10 nm in diameter) is formed instead of an amorphous layer (as observed at 150 °C on glass). Additionally, we demonstrate that, by adding an ex situ 200 °C annealing, the anatase domains also gain a fiber texture with the axes aligned to that of the substrate. The TiO2/AZO structural coupling is expected to play a crucial role for the carrier transport through the interface as required in dye-sensitized solar cells. Moreover, the low temperatures used render the process compatible with commonly used plastics substrates.

Formation of epitaxial γ-FeSi2 and β-FeSi2 layers on (111) Si

Abstract Polycrystalline β-FeSi 2 layers, 85 nm thick, thermally grown on (111) Si substrates have been irradiated by 25 ns ruby-laser pulses in the energy density range 0.4–1.2 J/cm 2 . Formation of the epitaxial metastable γ-FeSi 2 has been observed in a selected energy dendity range. The stability of γ-FeSi 2 has been tested by annealing in the 300–800°C temperature range. The precipitation of the γ phase into the stable β occurred at temperatures above 600°C. The β-FeSi 2 films maintained epitaxy with Si and presented a reduction of the roughness with respect to the thermally grown film.

Improvement of CoSi2 thermal stability by cavity formation

We propose a method to improve the thermal stability of thin CoSi2 layers on polycrystalline silicon substrates. Nitrogen atoms have been implanted at 55 keV to a dose of 5×1015/cm2 through a 70 nm silicide layer in order to locate the implanted peak near the silicide/silicon interface. The large band of cavities created at the interface has extended the thermal stability window by 125 °C with respect to the standard process. The improvement has been related to the silicide grain-boundary pinning due to the increase of the interface free energy contribution.

Correlation between microstructure control, density and diffusion barrier properties of TiN(O) films

TiN layers have been used as diffusion barriers to prevent intermixing of aluminium and silicon. During TiN deposition on Ti by reactive sputtering, oxygen has been introduced in-situ into the barrier. Depending on the oxygen flow, a different content of oxygen has been incorporated into the TiN layer during the growth. The layer composition, resistivity and stress are very sensitive to this content. To improve the effectiveness of the barrier, the microstructure of the TiN(O) layer has been optimised on blanket films. Nevertheless, on devices, depletion of nitrogen has been found at the bottom of the contact hole due to geometrical flux variation. This deficiency, that causes the aluminium to spike into the barrier, has been balanced by increasing the nitrogen flow during deposition. In this way, A1 penetration towards the silicon substrate has been prevented and the base current of npn transistors do not increase when annealing up to 480°C 1 h.

Ion beam assisted growth of β‐FeSi2*

This article reports the structural and morphological characterization of β‐FeSi2 films, about 120 nm thick, grown by ion beam assisted deposition (IBAD). The silicide layers were obtained by Fe evaporations onto (001) Si substrates maintained at T=600 °C, while an Ar+ beam bombarded the sample surface at an energy ranging between 100 and 650 eV. Beta‐FeSi2 films were even grown at several ion current densities and, in one case, the beam bombardment was limited to the early stage of the silicide formation. We have found that IBAD process reduces the crystalline grain size and improves the film morphology. Moreover, the relationship between ion beam process and grain nucleation at the silicide/silicon interface shows that when the number of Ar+ reaching the silicide/Si interface is about 1/3 of the Si substrate surface atomic density, the nucleation mechanism tends to saturate.

Interface Electrical Properties of Al2O3 Thin Films on Graphene Obtained by Atomic Layer Deposition with an in Situ Seedlike Layer

High-quality thin insulating films on graphene (Gr) are essential for field-effect transistors (FETs) and other electronics applications of this material. Atomic layer deposition (ALD) is the method of choice to deposit high-κ dielectrics with excellent thickness uniformity and conformal coverage. However, to start the growth on the sp2 Gr surface, a chemical prefunctionalization or the physical deposition of a seed layer are required, which can effect, to some extent, the electrical properties of Gr. In this paper, we report a detailed morphological, structural, and electrical investigation of Al2O3 thin films grown by a two-steps ALD process on a large area Gr membrane residing on an Al2O3-Si substrate. This process consists of the H2O-activated deposition of a Al2O3 seed layer a few nanometers in thickness, performed in situ at 100 °C, followed by ALD thermal growth of Al2O3 at 250 °C. The optimization of the low-temperature seed layer allowed us to obtain a uniform, conformal, and pinhole-free Al2O3 film on Gr by the second ALD step. Nanoscale-resolution mapping of the current through the dielectric by conductive atomic force microscopy (CAFM) demonstrated an excellent laterally uniformity of the film. Raman spectroscopy measurements indicated that the ALD process does not introduce defects in Gr, whereas it produces a partial compensation of Gr unintentional p-type doping, as confirmed by the increase of Gr sheet resistance (from ∼300 Ω/sq in pristine Gr to ∼1100 Ω/sq after Al2O3 deposition). Analysis of the transfer characteristics of Gr field-effect transistors (GFETs) allowed us to evaluate the relative dielectric permittivity (ε = 7.45) and the breakdown electric field (EBD = 7.4 MV/cm) of the Al2O3 film as well as the transconductance and the holes field-effect mobility (∼1200 cm2 V-1 s-1). A special focus has been given to the electrical characterization of the Al2O3-Gr interface by the analysis of high frequency capacitance-voltage measurements, which allowed us to elucidate the charge trapping and detrapping phenomena due to near-interface and interface oxide traps.