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Publication
Featured researches published by Seiichi Ozawa.
asian solid state circuits conference | 2005
Seiichi Ozawa; Satoshi Miura; Seiichi Kousokabe; Yohei Ishizone; Shinichiro Tomosugi; Jun-ichi Okamura
This paper describes a wide band CDR with a new encoding scheme for a digital video data transmission. The CDR works from 105Mbps to 1365Mbps without any external frequency references. The proposed encoding scheme uses both PECT (periodic embedded clock transition) and PECT (periodic embedded clock period) scheme, and it helps the CDRs capture process. The CDR is using both digital and analog techniques. Digital block adjusts VCO frequency utilizing PECT and PECP scheme, and analog block maintains lock with small jitter. The device is fabricated on 0.35mum standard logic CMOS process
SID Symposium Digest of Technical Papers | 2011
Seiichi Ozawa; Hironobu Akita; Shinya Suzuki; Hidetoshi Miura; Shogo Hachiya; Takayuki Murakami; Kazuhisa Sasaki; Masahiro Kato
An intra-panel interface for large size and high refresh rate panel is proposed. A source synchronous clocking with a new calibration scheme enables data skew adjustment while eliminating sensitive analog circuits in source driver. 2Gbps operation required for a 80-inch 4K2K panel with the 8-bit RGB and 240Hz driving is verified.
Archive | 2005
Seiichi Ozawa; Jun-ichi Okamura; Yohei Ishizone; Satoshi Miura
Archive | 2005
Satoshi Miura; Jun-ichi Okamura; Seiichi Ozawa
Archive | 2003
Seiichi Ozawa; Jun-ichi Okamura
Archive | 2009
Hironobu Akita; Yohei Ishizone; Seiichi Ozawa; Satoshi Miura
Archive | 2010
Seiichi Ozawa; Hironobu Akita
Archive | 2010
Seiichi Ozawa; Hironobu Akita
Archive | 2005
Seiichi Ozawa; Jun-ichi Okamura; Yohei Ishizone; Satoshi Miura
Archive | 2011
Satoshi Miura; Seiichi Ozawa; Yohei Ishizone; Jun-ichi Okamura
