Sel Brian Colak

Lateral DMOS Power transistor design

Two dimensional analysis has been applied to model the lateral DMOST (LDMOST) transistor in the off condition. This approach predicts breakdown voltages beyond the conventional limit. Using this model, a 400 volt lateral transistor was designed, fabricated, and tested. The design values obtained from the numerical modeling, and the experimental results for a >425 volt LDMOST are presented.

Interface barrier height in ZnSe/GaAs structures

Abstract The electronic transport characteristics of Schottky metal/ n -ZnSe/ n + GaAs structures are presented. The small-signal-admittance characteristics of these structures show certain distinct features which are located at a bias point dependent on the interface barrier height. In most cases these features are sharp slope changes in the characteristics and their shapes are determined by the modulation of the effective hetero-interface barrier height with bias. In some samples, these features are seen in the form of sharp minima, and they correspond to cases where the interface pinning is strong. From the bias location of these features, the interface barrier height in thick n -ZnSe/ n + GaAs(100) structure is found to be 0.4–0.5 eV for electrons injected into ZnSe.

Communications and Sensing of Illumination Contributions in a Power LED Lighting System

In recent years, LED technology emerged as a prime candidate for the future illumination light source, due to high energy efficiency and long life time. In addition, LEDs offer a superior flexibility in terms of colors and shapes, which leads to a potentially infinite variety of available light patterns. In order to create these patterns via easy user interaction, we need to sense the local light contribution of each LED. This measurement could be enabled through tagging of the light of each LED with unique embedded IDs. To this end, we propose a new modulation and multiple access scheme, named as code- time division multiple access - pulse position modulation (CTDMA- PPM): a form of PPM which is keyed according to a spreading sequence, and in which the duty cycle is subject to pulse width modulation (PWM) according to the required lighting setting. Our scheme considers illumination constraints in addition to the communication requirements and, to our best knowledge, it has not been addressed by other optical modulation methods. Based on the proposed modulation method and multiple access schemes, we develop a system structure, which includes illumination sources, a sensor receiver and a control system. Illumination sources illuminate the environment and transmit information, simultaneously. According to our theoretical analysis, this system structure could support a number of luminaries equal to the size of the CDMA codebook times the dimming range.

Code Division-Based Sensing of Illumination Contributions in Solid-State Lighting Systems

Light-emitting diodes (LEDs) have emerged as a prime candidate for the light source of the future. To enable easy user interaction with a future lighting system consisting of many LEDs, this paper proposes a method to accurately measure and estimate the local light contributions of a large set of LEDs. This is enabled through tagging the light of each LED with an unique identifier. To this end, we propose a new family of modulation and multiple access schemes in this paper, named code-time division multiple access-pulse position modulation (CTDMA-PPM) and CTDMA-pulse width modulation (CTDMA-PWM). These schemes satisfy illumination constraints, are compatible with the commonly used PWM dimming of LEDs, and meet the multi-signal separation requirements for simultaneous measurement of illumination strengths. Based on these modulation methods, the paper develops algorithms to estimate illumination. Finally, performance analyses show that even for a very large number of LEDs, the sensing performance of the proposed system satisfies the requirements up to an adequate range.

Neural network using longitudinal modes of an injection laser with external feedback

A new optical neural-network concept using the control of the modes of an injection laser by external feedback is described by a simple laser model. This approach uses the wavelength dispersed longitudinal modes of the laser as neurons and the amount of external feedback as connection weights. The predictions of the simple model are confirmed both with extensive numerical examples using the laser rate equations and also by experiments with GaAlAs injection lasers. The inputs and connection weights to this laser neural network are provided by external masks which control the amount of feedback reaching the laser. Stochastic learning is used to obtain weight masks for a small three-input and four-output neural net for the numerical and experimental examples. Winner-take-all and exclusive-or operations are obtained on the input set with different weight masks. Both of these operations are also obtained in experiments with a three-input/four-output laser neural network operating at an estimated speed greater than 10 GCPS. The eventual speed of this type of neural network hardware is expected to reach well within TCPS range if it is built in an optoelectronic integrated circuit with dimensions in the order of a mm. Different neural-network architectures possible with this approach are discussed.

Design of high-density power lateral DMOS transistors

Significant reduction in the surface area required for high voltage lateral DMOS transistors (LDMOSTs) has been achieved. Application of a recently developed field shaping technique has resulted in transistors exhibiting breakdown voltages well in excess of the planar junction limit. Further extensions of the method predict LDMOSTs having active surface area less than or comparable to vertical MOS devices without sacrificing breakdown voltage or on-resistance.

Reverse avalanche breakdown in gated diodes

Abstract A two dimensional study of reverse avalanche breakdown in high voltage gated diodes is presented. The numerical method uses the finite difference solution of Poissons equation with appropriate boundary conditions. A modified two dimensional depletion region approximation is used to take into account the effects of accumulation and inversion near the insulator-semiconductor interface. It has been found that although the effects of surface states and accumulation on the breakdown is small, inversion changes the breakdown characteristics substantially. Breakdown voltage versus gate voltage curves are given for various geometries and doping properties. Good agreement has been achieved between the computed and experimental values of breakdown voltages for a large range of gate potentials.

Observation of hysteresis, transients, and photoeffects in the electrical properties of ZnSe/GaAs heterojunctions

Electronic transport properties of a Au/n‐ZnSe/n+GaAs structure are examined by studying the results of current‐voltage (I‐V) and capacitance‐voltage (C‐V) measurements at temperatures between 77 and 300 K in the dark and under illumination. C‐V data at 77 K in the dark show a large hysteresis indicating long‐time constants for reaching a steady state. The data also show a large shift in the peak capacitance towards higher‐bias values as compared to room‐temperature measurements. All 77‐K capacitance values in the dark are considerably lower than both the ones at 77 K under illumination and the ones at room temperature. These results suggest charging of the lattice‐mismatch‐induced extended defect states in ZnSe near the heterojunction interface as well as macroscopic effects such as barrier‐limited electron currents flowing into the ZnSe potential well. Furthermore, as additional evidence, 77‐K capacitance transients in the data show two distinct time constants which are due to an initial charge rearrang...

Vector mapping with a nonlinear electronic layer for distributed neural networks

Describes a new approach for obtaining neural network functionality using fully distributed electronic transport rather than lumped electronic circuit elements. For this, vector mapping abilities of a two-dimensional nonlinear inhomogeneous layer are analyzed. This layer is modeled as an inhomogeneous inversion layer in a multiterminal field effect semiconductor device. The author gives computed results as examples of nonlinear vector mapping abilities including nontrivial logic functions with such a layer. These results are achieved by defining relative or differential output signals for the representation of the output information. The type of mapping achieved here is analogous to the one with high-order neural networks. The memory function in the authors structure is imbedded in the distribution of the inhomogeneities.