Seohee Kim

Toward air-stable multilayer phosphorene thin-films and transistors

Few-layer black phosphorus (BP), also known as phosphorene, is poised to be the most attractive graphene analogue owing to its high mobility approaching that of graphene, and its thickness-tunable band gap that can be as large as that of molybdenum disulfide. In essence, phosphorene represents the much sought after high-mobility, large direct band gap two-dimensional layered crystal that is ideal for optoelectronics and flexible devices. However, its instability in air is of paramount concern for practical applications. Here, we demonstrate air-stable BP devices with dielectric and hydrophobic encapsulation. Microscopy, spectroscopy, and transport techniques were employed to elucidate the aging mechanism, which can initiate from the BP surface for bare samples, or edges for samples with thin dielectric coating, highlighting the ineffectiveness of conventional scaled dielectrics. Our months-long studies indicate that a double layer capping of Al2O3 and hydrophobic fluoropolymer affords BP devices and transistors with indefinite air-stability for the first time, overcoming a critical material challenge for applied research and development.

Long-Term Stability and Reliability of Black Phosphorus Field-Effect Transistors

Black phosphorus has been recently suggested as a very promising material for use in 2D field-effect transistors. However, due to its poor stability under ambient conditions, this material has not yet received as much attention as for instance MoS2. We show that the recently demonstrated Al2O3 encapsulation leads to highly stable devices. In particular, we report our long-term study on highly stable black phosphorus field-effect transistors, which show stable device characteristics for at least eight months. This high stability allows us to perform a detailed analysis of their reliability with respect to hysteresis as well as the arguably most important reliability issue in silicon technologies, the bias-temperature instability. We find that the hysteresis in these transistors depends strongly on the sweep rate and temperature. Moreover, the hysteresis dynamics in our devices are reproducible over a long time, which underlines their high reliability. Also, by using detailed physical models for oxide traps developed for Si technologies, we are able to capture the channel electrostatics of the black phosphorus FETs and determine the position of the defect energy band. Finally, we demonstrate that both hysteresis and bias-temperature instabilities are due to thermally activated charge trapping/detrapping by oxide traps and can be reduced if the device is covered by Teflon-AF.

Charge Transport in Deep and Shallow States in a High-Mobility Polymer FET

Polymer FETs generally have a wide subthreshold regime due to a lot of disorder, mainly originated from domain/grain boundaries. Deep states charge transport of polymer transistors has not been investigated due to the difficulty in determining the field-effect mobility in the subthreshold region. In this paper, the features of the charge transport in deep and shallow states of polymer transistors will be discussed in detail through an accurate modeling and an analysis of subthreshold behavior in transistors. Charge transport in shallow states can be described by multiple trap and release transport, while hopping transport models, such as variable range hopping or Gaussian disorder-based model, describe well the deeper states charge transport. In addition, the transition between the conduction regimes is a function of temperature and carrier density.

Polarization effects from the ambient and the gate dielectric on charge transport in polymer field-effect transistors

Charge transport in polymer field-effect transistors is hugely affected by the polarization effects, which can be originated from polar molecules in the gate dielectric and ambient air. In this letter, we investigate the polarization induced trapping enhancement by dipoles in the gate dielectric layer and ambient air at the same time through the experiment with varying conditions of surface dielectric and polar analytes in the atmosphere. We demonstrate the result from diketopyrrolopyrrole based co-polymer transistors with high mobility. Polarization effects from dipoles in the atmosphere affect mostly the shallower trap states and are relatively less severe when the interface of the gate dielectric is very polar.

Electrical performance enhancement of 20 nm scale graphene nanoribbon field-effect transistors with dipolar molecules

Graphene Nanoribbons (GNR) are been being investigated as they possess a bandgap in contrast to graphene sheets which have zero bandgap [1, 2]. Therefore, GNR might be more suitable as a channel material in field-effect transistors (FETs) which requires a high on/off ratio. The other electrical properties of GNR FETs apart from on/off ratio, however, are not as good as those of corresponding graphene sheet FETs. Most GNR FETs have a larger hysteresis, a lower mobility and a larger Dirac voltage than those of graphene sheet FETs. The critical factor that results in degraded performance of GNR FET is edge defects, since GNR due to their geometry have a larger number of edges per active channel width. Moreover, edges of patterned GNR from chemical vapor deposition (CVD) grown graphene do not have a perfect chirality and inevitably have more broken bonds. Thus defect passivation or amelioration assumes considerable importance if the excellent potential of GNR as a semiconducting material is to be realized. In this abstract we report the effect of polar vapors on the electrical characteristics of GNR FET, which is fabricated via patterning from CVD grown graphene monolayer sheet. Our goal is to use these as model studies in designing suitable cap layers that both protect the nanoribbons from the ambient and favorably influence, to a considerable degree, their electrical properties.

Inkjet printed carbon nanotubes in short channel field effect transistors: influence of nanotube distortion and gate insulator interface modification

We report on the effects of mechanical distortion and gate insulator-semiconductor interface modification on the electronic transport characteristics of inkjet printed short channel length single walled carbon nanotube (SWCNT) transistors with Al2O3 top gate insulators. In these transistors, which are typically ambipolar, the average nanotube length is greater than the source-drain (S/D) spacing resulting in individual SWCNTs spanning the entire channel length. Mechanical distortion of the nanotubes due to bending near source and drain contacts when they are not recessed is found to suppress electron transport and transform the ambipolar transistors into p-type devices. Inclusion of printed interfacial polymer layers such as poly(vinylidene fluoride-trifluoroethylene) (PVDF-TrFE) between the SWCNTs and Al2O3 also results in p-type doping and reductions in electron transport. We discuss mechanisms responsible for these effects.

Mitigation of charged impurity effects in graphene field-effect transistors with polar organic molecules (Presentation Recording)

Recent developments in monolayer graphene production allow its use as the active layer in field-effect transistor technology. Favorable electrical characteristics of monolayer graphene include high mobility, operating frequency, and good stability. These characteristics are governed by such key transport physical phenomena as electron-hole transport symmetry, Dirac point voltage, and charged impurity effects. Doping of graphene occurs during device fabrication, and is largely due to charged impurities located at or near the graphene/substrate interface. These impurities cause scattering of charge carriers, which lowers mobility. Such scattering is detrimental to graphene transistor performance, but our group has shown that coating with fluoropolymer thin films or exposure to polar organic vapors can restore favorable electrical characteristics to monolayer graphene. By partially neutralizing charged impurities and defects, we can improve the mobility by approximately a factor of 2, change the Dirac voltage by fairly large amounts, and reduce the residual carrier density significantly. We hypothesize that this phenomena results from screening of charged impurities by the polar molecules. To better understand such screening interactions, we performed computational chemistry experiments to observe interactions between polar organic molecules and monolayer graphene. The molecules interacted more strongly with defective graphene than with pristine graphene, and the electronic environment of graphene was altered. These computational observations correlate well with our experimental results to support our hypothesis that polar molecules can act to screen charged impurities on or near monolayer graphene. Such screening favorably mitigates charge scattering, improving graphene transistor performance.

Novel double layer graphene transistors-bilayer pseudospin FETs and 2D-2D tunnel FETs

In this paper, bilayer pseudospin FET (BiSFET) is fabricated and tested for the condensate using Coulomb drag measurements in the double layer graphene system. The basic BiSFET structure can also be used as 2D-2D single particle tunnel FET, and the single particle h-h and e-e 2D-2D tunnel FETs, which is graphenes single-atom thickness could lead to more ideal interlayer tunneling characteristics provided the layers can be aligned. Single particle tunneling current calculations have been performed which show NDR characteristics, reminiscent of the BiSFET, albeit with higher operating powers.