Seok-Woo Lee

P-2: 3.5 inch QVGA Low-Temperature Poly-Si TFT LCD with Integrated Driver Circuits

Using the low temperature poly-Si technology, the 3.5-inch diagonal QVGA320* RGB*240 TFT-LCD with integrated circuits was developed for handheld applications. We integrated 6 bit digital data driver with ramp-type digital-analogue converter and gate driver that can operate bi-directionally. The characteristics of the poly-Si TFT used to integrate driver circuits are followings; 1 in NMOS, Vth∼2V and mobility∼200cm2/Vsec, 2 in PMOS, Vth ∼ −1.61V and mobility ∼100cm2/Vsec.

Improved reliability of low-temperature polysilicon TFT by post-annealing gate oxide

We have investigated the electrical characteristics of gate oxide films deposited by plasma enhanced chemical vapor deposition (PECVD) with respect to gate oxide integrity (GOI) and its reliability. In the investigation, post-annealed gate oxide was compared with as-deposited oxide. It was shown that the characteristics of GOI strongly depended on the charge trapping characteristics and deep level interface states generation under FN stress, which was remarkably improved by post-annealing after gate oxide deposition. Improved FN stress and hot carrier stress reliability of CMOS devices implemented on the glass substrate are also discussed.

7.2: Realization of 6Mask LTPS CMOS Panel for AMLCD Application

6Mask CMOS process in low temperature polycrystalline silicon thin film transistors (poly-Si TFTs) has been developed and verified by manufacturing a 6Mask CMOS panel. The 6Mask CMOS structure is suitable for the panel operation with line inversion, where a novel process is adopted to substitute for the storage doping of conventional structure without an additional mask step.

A Study on Improving the Reliability of Polysilicon TFTs Employing Dual-Layered Gate Insulator

The reliability of polysilicon thin-film transistors (poly-Si TFTs) employing the dual-layered gate insulator was investigated. We suggested the use of the double gate insulator, which is composed of silicon oxide (SiO 2 ) and silicon nitride (SiN x ), to overcome the lower gate-oxide reliability and high leakage-current problems caused by the thin gate insulator of poly-Si TFTs. The breakdown field increased to 9 MV/cm and the leakage current decreased by up to 1 order of magnitude compared with that of TFT using the single gate insulator. Experimental results showed that the reliability of poly-Si TFTs employing the SiN x /SiO 2 gate insulator was greatly improved by the reduced charge trapping and the relatively larger thermal conductivity of the SiN x film.

27.1: A Novel Structure of AMLCD Panel Using Poly‐Si CMOS TFT

In the fabrication of CMOS AMLCD panel, there has been much effort to reduce the number of mask steps in order to achieve the simpler process as well as the low-cost production. In this paper, we report a 3.5-inch QVGA CMOS AMLCD panel with 6-bit driver and DAC through the 7-mask process that requires fewer mask steps than conventional 9-mask process.

P-3: Analysis of Poly-Si TFTs' Degradation Behavior Induced by DC Stress

DC stress induced degradation was compared between LTPS short channel LDD NMOSFETs and PMOSFETs with a dimension of W/L = 3/3 μm/μm by degradation mapping of device parameters. Asymmetric degradation phenomena were classified for different type of devices and compared with respect to applied bias and power.