Seongpil Chang

Efficient suppression of charge trapping in ZnO-based transparent thin film transistors with novel Al2O3/HfO2/Al2O3 structure

Charge trapping is dramatically suppressed in ZnO transparent thin film transistors (TFTs) employing a multilayered gate insulator with HfO2 layer sandwiched by Al2O3 layers. In spite of its high dielectric constant, HfO2 has critical drawbacks including huge charge trap density in interfaces. We suggest and demonstrate an elegant solution to minimize the charge trapping introducing Al2O3 buffer layers. The operation of Al2O3∕HfO2∕Al2O3 multilayered gate-insulator structure in the ZnO transparent TFT is evaluated to ensure the voltage difference in the hysteresis loop as low as 0.2V, and the immunization to the threshold voltage shift induced by repeated sweeps of gate voltage.

The vertically stacked organic sensor-transistor on a flexible substrate

The authors report on the photo-response characteristics of flexible sensor-transistor circuits (ST-circuits) made with (poly(3-hexylethiophene)/phenyl-C61-butryic acid methyl ester) (P3HT/PCBM) bulk heterojunction polymer and pentacene-based organic field-effect transistors, which are stacked via poly(dimethylsiloxane) (PDMS) on the plastic substrate. The results indicate that the anode-source current is variable because of both the charge separation of the photogenerated excitons and the accumulated charges at the OFET channel layer. The light dependent photo response (ΔI/I0) is modulated from 0.47 to 1.9 by the gate-source voltage at the fixed anode-source voltage of the ST-circuits.

High-Performance Amorphous Indium Oxide Thin-Film Transistors Fabricated by an Aqueous Solution Process at Low Temperature

This paper presents low temperature solution-processed fabrication techniques for modern thin-film transistors (TFTs). We have investigated the electrical performance of aqueous solution-processed amorphous indium oxide (a-In2O3) TFTs prepared using different annealing temperatures. Even though the a-In2O3 TFTs were annealed at 200 °C, electrical characteristics of aqueous solution-processed a-In2O3 TFTs were obtained. High performance such as a saturation mobility of 8.6 cm2 V-1 s-1 and an on/off current ratio of over 106 was exhibited by a-In2O3 TFTs annealed at 250 °C.

The silicon Schottky diode on flexible substrates by transfer method

A flexible silicon barrier diode was fabricated by the transfer printing method. Micro-line patterned p-type single crystalline silicon membranes were created from a silicon on insulator wafer. The dark current of our device was very low, about 1 pA for reverse bias voltages up to 5 V, and showed rectifying behavior with an ideality factor of 1.05. The photo-response and the responsivity was 32 and 0.3 A/W, respectively, for light intensity of 1.2 mW/cm2. Also, the current of the photodetector changed under compressive stress or tensile stress. Our device is functional as the piezotronic sensor as well as the photodetector.

Ultraviolet and visible light detection characteristics of amorphous indium gallium zinc oxide thin film transistor for photodetector applications

The ultraviolet and visible light responsive properties of the amorphous indium gallium zinc oxide thin film transistor have been investigated. Amorphous indium gallium zinc oxide (a-IGZO) thin film transistor operate in the enhancement mode with saturation mobility of 6.99 cm 2 /Vs, threshold voltage of 7.6 V, subthreshold slope of 1.58 V/dec and an on/off current ratio of 2.45×10 8 . The transistor was subsequently characterized in respect of visible light and UV illuminations in order to investigate its potential for possible use as a detector. The performance of the transistor is indicates a high-photosensitivity in the offstate with a ratio of photocurrent to dark current of 5.74×10 2 . The obtained results reveal that the amorphous indium gallium zinc oxide thin film transistor can be used to fabricate UV photodetector operating in the 366 nm.

Scaling down of amorphous indium gallium zinc oxide thin film transistors on the polyethersulfone substrate employing the protection layer of parylene-C for the large-scale integration

We have investigated the parylene-groups for the device scaling-down as the protection layer of polyethersulfone (PES) substrate. In general, photolithography process on the PES substrate could not be allowed due to its poor chemical resistance. In this work, parylene-C is used as the protection layer. However, adhesion problem is observed caused by the hydrophobic property of parylene-groups. Thereby we additionally used SiO2 as the adhesion layer. Finally, we demonstrated the scaling-down of amorphous indium gallium zinc oxide thin film transistor on a plastic substrate by using lithography technique. Field-effect mobility, threshold voltage, current on-to-off ratio are measured to be 0.84 cm2/V s, 19.7 V, and 7.62×104, respectively.

The Approach for the Trade-off Study Between Field-effect Mobility and Current on/off Ratio in P3HT Field-effect Transistors

Presented herein are the results of the study that was conducted on the electrical characteristics of organic field-effect transistors based on poly(3-hexylthiophene), particularly the thickness and annealing temperature of their active layer is varied. The changes in field-effect mobility and current on/off ratio were explored. It was observed that both increasing annealing temperature from to and various concentrations influence the trade-off relations between the mobility and current on/off ratio. The surface morphology of the 2- area with various thicknesses was scanned via atomic-forcemicroscopy(AFM) to verify the relationship between surface morphology, which is related to the thickness of the film, and device performance.