Sergey Nabokin

Design of a low VSWR harmonics, low loss SP6T switch for GSM/Edge applications.

In this paper the design and measurement of a high performance SP6T GaAs pHEMT switch for Quad-Band GSM/EDGE Front-Ends are discussed. The design uses a novel approach to reduce the generated harmonic levels at 3 V supply, 35 dBm drive and antenna VSWR of 5:1 down to -40 dBm, the lowest levels for the multi-mode multi-throw switches reported to date. Besides low harmonic performance, low TX insertion loss of below 0.5 dB at 2 GHz and RX insertion loss of below 1 dB at 2 GHz is achieved.

A highly integrated single chip 5–6 GHz front-end IC based on SiGe BiCMOS that enhances 802.11ac WLAN radio front-end designs

A highly integrated 4.9-5.9 GHz single chip front-end IC (FEIC) is presented, which is based on SiGe BiCMOS, realized in a 1.6 mm2 chip area and in an ultra-compact 1.7 × 2.0 × 0.33 mm3 package. The Tx chain has >30 dB gain and meets -40 dB DEVM up to Pout of 15 dBm and -35 dB DEVM up to Pout of 17 dBm with a 3.3 V supply, insensitive to modulation bandwidths and duty cycle. The ultra-low back-off DEVM enables the emerging 1024-QAM applications. The integrated log detector enhances the dynamic range for the transmit power control. The Rx chain features <;2.8 dB NF and 15 dB gain with 3 dBm IIP3 and 10 dB bypass attenuator with 23 dBm IIP3. All the unique features enhance the front-end circuit designs of complex radios based on the 802.11ac standard.

A compact high directivity coupler with ±0.15dB error under VSWR 2.5∶1 for 3×3mm 2 UMTS power amplifier modules

This paper presents an approach to design high directivity couplers on compact multilayer power amplifier module (PAM). Coplanar and bilevel coupled lines structures are analyzed and compared. The effects of layout are investigated. A bilevel coupled line coupler is developed and integrated into 700MHz UMTS 3×3mm2 PAM. It achieves more than 28dB directivity and the coupling factor variation of PAM is within ±0.15dB under VSWR 2.5∶1.

Enhanced linearity technique for multithrow TX/RX switches.

A highly linear 9 throw switch for GSM/WCDMA applications with an IMD2/3 of -105 dBm at the control voltages starting as low as 2.8/0 V has been successfully developed. This high linearity performance was achieved using a backside bias technique which does not degrade the power handling capability of the device resulting in the harmonics performance below -35 dBm for VSWR 5:1 at the control voltages 3.2/0 V and TX/TRX losses below 0.9 dB at 2GHz.

Optimum Matching Technique for the Switch Design

The theoretical background and hardware implementation of optimal matching filters designed to minimize harmonic generation by RF switches and provide harmonic filtering of the PA generated harmonics is presented. The switch with the optimally matched filters shows 5-7 dB improvements in harmonics generated under high VSWR, leading to better than -39dBm harmonics at 35/33 dBm for all phases of VSWR=5:1 for low/high band GSM applications. This technique leads to a fully integrated solution offering both improved harmonics performance and reduced size.