Seyed Behzad Naderi
University of Tasmania
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Publication
Featured researches published by Seyed Behzad Naderi.
IEEE Transactions on Power Delivery | 2011
Mehdi Jafari; Seyed Behzad Naderi; Mehrdad Tarafdar Hagh; Mehdi Abapour; S. H. Hosseini
In this paper, voltage sag compensation of point of common coupling (PCC) using a new structure of fault current limiter (FCL) is proposed. The proposed structure prevents voltage sag and phase-angle jump of the substation PCC after fault occurrence. This structure has a simple control method. Using the semiconductor switch (insulated-gate bipolar transistor or gate turnoff thyristor at dc current rout leads to fast operation of the proposed FCL and, consequently, dc reactor value is reduced. On the other hand, the proposed structure reduces the total harmonic distortion on load voltage and it has low ac losses in normal operation. As a result, other feeders, which are connected to the substation PCC, will have good power quality. Analytical analysis and simulation results using PSCAD/EMTDC software and experimental results are presented to validate the effectiveness of this structure.
IEEE Transactions on Industrial Electronics | 2013
Seyed Behzad Naderi; Mehdi Jafari; Mehrdad Tarafdar Hagh
This paper proposes a new parallel-LC-resonance-type fault current limiter (FCL) that uses a resistor in series with a capacitor. The proposed FCL is capable of limiting the fault current magnitude near to the prefault magnitude of distribution feeder current by placing the mentioned resistor in the structure of the FCL. In this way, the voltage of the point of common coupling does not experience considerable sag during the fault. In addition, the proposed FCL does not use a superconducting inductor which has high construction cost. Analytical analysis for this structure is presented in detail, and simulation results using power system computer-aided design/electromagnetic transients, including dc software are obtained to validate the effectiveness of this structure. Also, an experimental setup is provided to show the accuracy of the analytic analyses and simulation results.
2010 1st Power Electronic & Drive Systems & Technologies Conference (PEDSTC) | 2010
M. Tarafdar Hagh; Mehdi Jafari; Seyed Behzad Naderi
In this paper, transient stability of Single Machine Infinite Bus (SMIB) system with a Non-superconducting Fault Current Limiter (NSFCL) is proposed. Analytic analysis of system stability is discussed in detail and as result, optimal value of NSFCL resistance during fault that leads to effective improvement of stability is calculated. Equal area criterion is used for this calculation. Study system is simulated by EMTDC/PSCAD to verify the effectiveness of the optimal resistor value of the proposed NSFCL.
ieee international conference on power and energy | 2010
Mehrdad Tarafdar Hagh; Seyed Behzad Naderi; Mehdi Jafari
In this paper, enhancement of transient stability of Single Machine Infinite Bus (SMIB) system with a double circuit transmission line using a Non-superconducting Fault Current Limiter (NSFCL) is proposed. Stability analysis for such system is discussed in detail. It is shown that, the stability depends on the resistance of NSFCL in fault condition. To effective improvement of stability, the optimum value of NSFCL resistance is calculated. Simulation results by PSCAD/EMTDC software are presented to confirm the analytic analysis accuracy.
ieee international conference on power and energy | 2010
Mehrdad Tarafdar Hagh; Seyed Behzad Naderi; Mehdi Jafari
This paper proposes a new parallel LC resonance type Fault Current Limiter (FCL). This structure has low cast because of using dry capacitor and non-superconducting inductor and fast operation. The proposed FCL is able to limit fault current in constant value near to pre-fault condition value against series resonance type FCL. In this way, the voltage of point of common coupling (PCC) will not change during fault. Analytical analysis is presented in detail and simulation results are involved to validate the effectiveness of this structure.
ieee industry applications society annual meeting | 2015
Seyed Behzad Naderi; Michael Negnevitsky; Amin Jalilian; Mehrdad Tarafdar Hagh; Kashem M. Muttaqi
This paper proposes an optimum resistive type fault current limiter (OR-FCL) as an efficient solution to achieve maximum fault ride-through (FRT) capability of fixed-speed wind turbines (FSWT) during various grid faults. In this paper, a dedicated control circuit is designed for the OR-FCL that enables it to insert an optimum value of resistance in the FSWTs fault currents path for improving transient behavior of the FSWT. The optimum resistance value depends on fault location and prefault active power. The control circuit of the proposed OR-FCL is capable of calculating the optimum resistance value for all the prefault conditions. By using the proposed control circuit, the FSWT can achieve its maximum FRT capability during symmetrical and asymmetrical faults, even at zero grid voltage. Analysis is provided in detail to highlight the process of calculating the optimum resistance of the OR-FCL. Moreover, the effect of the resistance value of the OR-FCL on the FRT behavior of FSWT is investigated. To show the efficiency of the proposed OR-FCL, its performance during various operation conditions of the FSWT is studied. It can be proved that each operation condition needs its own optimum resistance value, which can be obtained by using the proposed control circuit during the fault to achieve the maximum FRT capability of the FSWT. Comprehensive sets of simulations are carried out in PSCAD/EMTDC software and the results prove the effectiveness of the proposed approach.
IEEE Transactions on Industry Applications | 2017
Seyed Behzad Naderi; Michael Negnevitsky; Amin Jalilian; Mehrdad Tarafdar Hagh; Kashem M. Muttaqi
This paper proposes an optimum resistive type fault current limiter (OR-FCL) as an efficient solution to achieve maximum fault ride-through (FRT) capability of fixed-speed wind turbines (FSWT) during various grid faults. In this paper, a dedicated control circuit is designed for the OR-FCL that enables it to insert an optimum value of resistance in the FSWTs fault currents path for improving transient behavior of the FSWT. The optimum resistance value depends on fault location and prefault active power. The control circuit of the proposed OR-FCL is capable of calculating the optimum resistance value for all the prefault conditions. By using the proposed control circuit, the FSWT can achieve its maximum FRT capability during symmetrical and asymmetrical faults, even at zero grid voltage. Analysis is provided in detail to highlight the process of calculating the optimum resistance of the OR-FCL. Moreover, the effect of the resistance value of the OR-FCL on the FRT behavior of FSWT is investigated. To show the efficiency of the proposed OR-FCL, its performance during various operation conditions of the FSWT is studied. It can be proved that each operation condition needs its own optimum resistance value, which can be obtained by using the proposed control circuit during the fault to achieve the maximum FRT capability of the FSWT. Comprehensive sets of simulations are carried out in PSCAD/EMTDC software and the results prove the effectiveness of the proposed approach.
ieee industry applications society annual meeting | 2017
Seyed Behzad Naderi; Michael Negnevitsky; Kashem M. Muttaqi
According to the grid code requirements, doubly-fed induction generator (DFIG) based wind turbines should remain connected to gird during fault conditions for specific time frame depending voltage sag level. A simple DC chopper is employed in DC-link to protect the DFIG from over-voltage; however it is not capable to keep high transient over-currents in an acceptable level in stator side and rotor side of the DFIG. Therefore, an effective current limiting strategy should be incorporated with the DC chopper to improve fault ride-through (FRT) capability of the DFIG. In this paper, a modified DC-link chopper is proposed to keep both the DC-link voltage and the high current level in stator and rotor sides in a permissible level without incorporating any extra fault current limiting strategy. Unlike the general DC chopper configuration, in the proposed DC chopper, it is not required to cease rotor side converter (RSC) switching and employ high rated current antiparallel diodes. The proposed modified DC chopper is placed between the DC-link capacitor and the RSC. In the proposed switching strategy, three extra semiconductor switches are included, which are trigged to insert DC chopper resistance either in parallel or series connections with the DC-link. To prove effectiveness and robustness of the proposed modified DC-link chopper, symmetrical and asymmetrical faults are applied in a power system containing DFIG based wind turbine modelled in PSCAD/EMTDC software. The results are promising in terms of both limiting the fault current and controlling the DC-link voltage of the DFIG.
australasian universities power engineering conference | 2017
Seyed Behzad Naderi; Mehdi Jafari; Amir Zandnia; Amin Jalilian; Pooya Davari; Michael Negnevitsky; Frede Blaabjerg
In this paper, a capacitor switching transient limiter based on a three phase variable resistance is proposed. The proposed structure eliminates the capacitor switching transient current and over-voltage by introducing a variable resistance to the current path with its special switching pattern. This topology has high damping capability due to its resistance nature and low voltage drop and low power losses due to complete bypass of its resistor. Therefore, it does not need auxiliary circuit to compensate voltage drop in normal condition. Also, because of smooth bypass of resistance, it does not make transients on capacitor after bypassing. Analytic Analyses for this structure in transient cases are presented in details and simulations are performed by MATLAB software to prove its effectiveness.
australasian universities power engineering conference | 2016
Seyed Behzad Naderi; Michael Negnevitsky; Amin Jalilian; Mehrdad Tarafdar Hagh
This paper proposes a controllable resistive type fault current limiter (CR-FCL) with its modified control strategy to improve fault ride-through capability (FRT) of fixed speed wind turbine (FSWT). Investigated system includes squirrel cage induction generator, the CR-FCL, and the FSWT connected to infinite bus through double-circuit transmission line. The CR-FCL is located in beginning of the parallel line. The proposed structure with its modified control method inserts an optimum value of resistance during fault to achieve maximum FRT capability. It will be shown that this optimum value depends on fault location and pre-fault active power. Two different wind speeds will be applied to the investigated system, which cause two various output powers. Then, it will be proved that each condition needs its own optimum resistance during the fault to achieve the maximum FRT capability of the FSWT. PSCAD/EMTDC is utilised to show accuracy of the proposed scheme and analytical analysis.