Sha Xia

A capacitance-to-digital converter for displacement sensing with 17b resolution and 20μs conversion time

In precision mechatronic systems, such as wafer steppers, the position of critical mechanical components must be dynamically stabilized with sub-nanometer precision. This can be achieved by a servo loop consisting of a displacement sensor and an actuator. Compared to optical interferometers, capacitive displacement sensors offer smaller size and lower cost. However, mechanical tolerances limit their electrode spacing to about 10μm [1], while the targeted resolution is below 100pmrms. This requires a capacitance-to-digital converter (CDC) with more than 17b resolution. Furthermore, its latency must be low enough (20μs) to avoid compromising servo-loop stability. Lastly, it should be stable enough to maintain measurement accuracy during the intervals between system calibrations.

Power-Efficient High-Speed and High-Resolution Capacitive-Sensor Interface for Subnanometer Displacement Measurements

This paper presents a power-efficient capacitive-sensor interface solution for high-speed and high-resolution subnanometer displacement measurement systems. The proposed solution utilizes a zoom-in capacitance-to-voltage converter stage to remove the offset posed by the large nominal sensor capacitance, which would otherwise dominate the dynamic range. The realized zoom-in factor is 100. The designed circuit uses a correlated-double-sampling technique to cancel both the amplifier offset and the reset noise. First, a printed-circuit-board solution was realized to verify the principle of operation and its limitations. Then, an integrated circuit was designed, fabricated, and tested. Measurement results show that the achievable capacitance resolution is better than 30 aF, from a sensor with a nominal capacitance of 10 pF, which translates into a dynamic range of 18 b. The measurement latency is only 5 μs. This performance is achieved with only 2.4-mW power consumption.

Design of an Optimized Electrothermal Filter for a Temperature-to-Frequency Converter

In this paper, an analytical model of an electrothermal filter (ETF) is described. It is based on thermal impedance theory and employs several simplifying assumptions to model an ETF implemented in CMOS technology. A CMOS ETFs phase-shift has a well-defined temperature dependence, and can be utilized to build temperature-to-frequency converters (TFC). However, the resolution of such converters is limited by the ETFs SNR. The analytical model was used to design an optimized ETF with increased SNR in a standard 0.7-mum CMOS process. Compared to a previous design, a TFC employing this new ETF achieved 30% less output frequency jitter.

Electrical and Optical Performance Investigation of Si-Based Ultrashallow-Junction

Recently, a silicon-based ultrashallow-junction photodiode (B-layer diode) has been reported, with very high and very stable sensitivity in the vacuum-ultraviolet and extreme-ultraviolet spectral ranges. However, the ultrashallow nature of the junction leads to a high series resistance of the photodiode if no conductive capping layers are used. In a recent paper by Shi , a study on the relation between the sensitivity and the series resistance of the B-layer diodes, which can be large due to the shallow-junction depth, was presented. In this paper, an extensive analysis of the photodiode electrical and optical performance parameters and their interrelation is given. The influence of the series resistance on the response time of the photodiode for different illumination patterns is studied theoretically and also experimentally verified. It has been proven by modeling, simulations, and experiments that the time constant of the photodiode does not change significantly with the illumination spot area. This effect is due to temporary variations, going in opposite directions, of the equivalent series resistance, and the junction capacitance values found at the first instant a photogenerated charge are locally stored in the photodiode p-n junction. Also, the dependence of the degradation of the sensitivity on the incident wavelength and the diode vertical stack is examined through analysis and experimentation.

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There is a strong relation between the size, the shape and the location of the illuminated part of a shallow-junction photodiode, and its series resistance [2, 3, 4]. This relation creates an expectation for a big variation of the response time (the time for which the photo-generated charge will be removed from the photodiode) with the illuminated spot size. This is because the time constant of the photodiode, which is one of the main factors defining the response time, is a product of the series resistance multiplied by the junction capacitance. In this work the dependence of the charge removal time of a shallow photodiode on the size of the illuminated area, is studied. Simulation results, as well as measurement data, show that the response time is changing only slightly with the position and the size of the illuminated spot size, when very short light pulses are used. After the incidence light is over, the discharging of the photodiode continues with a time constant, which is highly independent of the size and the location of the illuminated part of the photodiode.

VUV/EUV Photodiodes

This paper addresses the challenges related to the design of a high-resolution, low-latency capacitive displacement sensor. An auto-alignment mechanism of the sensor head is proposed which relaxes the resolution requirement of the readout circuit. The measurement strategy that enables power-efficient low latency measurement is introduced.

Response Time of Silicon Photodiodes for DUV/EUV Radiation

This paper presents a comparative study of the power consumption of two methods to cancel the offset capacitance in high-resolution capacitive displacement sensors. One method is applied based on correlated-double-sampling (CDS) technique and the other method is applied using oversampling technique. The analytical comparison predicts similar power consumption, if the same resolution for the same conversion time need to be reached. Experimental results with implementations of the two methods confirmed the analytical prediction.

Concept evaluation of a high performance self-aligning capacitive displacement sensor

This paper motivates the use of a “zoom-in” front-end stage to remove the effect of a large nominal sensor capacitance of a capacitive displacement sensor, intended for measuring small displacements. In this way, the dynamic range requirement for the following stages, namely the ADC, is greatly relaxed. The designed circuit uses correlated double sampling to cancel both amplifiers offset and the reset noise. A PCB prototype with standard off-the-shelf components is built up, to verify noise-canceling principle and evaluate the achievable capacitance resolution. An input referred capacitance resolution of 21 aF (rms) is measured, from a capacitive sensor with a nominal capacitance of 10 pF.

Comparison of different methods to cancel offset capacitance in capacitive displacement sensors

An autonomous capacitive sensor system for high accuracy and stability position measurement, such as required in high-precision industrial equipment, is presented. The system incorporates a self- alignment function based on a thermal stepping motor and a built-in capacitive reference, to guarantee that the relative position between the sensor electrodes is set to 10±0.1 μm. This is needed to achieve the performance specifications with the capacitive readout. In addition, an electronic zoom-in method is used to reach the 10 pm resolution with minimum power dissipation. Finally, periodic self-calibration of the electronic capacitance readout is realized using a very accurate and stable built-in resistive reference. The performance is evaluated experimentally and with simulations.

Zoom-in frontend for power-efficient high-speed and high-resolution capacitive sensor measurement system

We report an integrated front-end circuit for capacitive displacement sensors, suitable for measuring small displacements superimposed on a much larger stand-off distance between the sensing and the target electrodes. In order to cancel the effect of the resulting offset capacitance, a circuit technique called electrical zoom-in is applied in the interfacing circuit. After removing the offset capacitance of a sensor with 10 pF nominal capacitance, the output-swing of the front-end corresponds to 100 fF of capacitance variation only, relaxing the specification of the following analog-to-digital converter (ADC) stage by a factor of 40.The zoom-in front-end can achieve an input referred capacitance resolution of 30 aF (RMS) from a nominal sensor capacitance of 10 pF, with a measurement latency of only 5 us. This result is achieved with 2.4 mW power consumption in the front-end.