Shahid Masud

Selection of variable block sizes in H.264

The paper aims at selecting an efficient variable block size mode in H.264 video coding standard for better compression performance. This standard allows video frames to be partitioned into variable block sizes such that blocks containing highly detailed motion are represented using small block sizes and the rest using large block sizes. New techniques for intelligent selection of the variable block sizes have been developed to reduce the computational complexity without sacrificing the quality of the coder. The proposed schemes are based on the motion vector cost and previous frame information. An improvement in the encoding time with negligible impact on the subjective and the quantitative performance has been achieved. A comparison of the proposed techniques for various test sequences is also provided.

Reusable silicon IP cores for discrete wavelet transform applications

Architectures and methods for the rapid design of silicon cores for implementing discrete wavelet transforms over a wide range of specifications are described. These architectures are efficient, modular, scalable, and cover orthonormal and biorthogonal wavelet transform families. They offer efficient hardware utilization by exploiting a number of core wavelet filter properties and allow the creation of silicon designs that are highly parameterized, including in terms of wavelet type and wordlengths. Control circuitry is embedded within these systems allowing them to be cascaded for any desired level of decomposition without any interface glue logic. The time to produce chip designs for a specific wavelet application is typically less than a day and these are comparable in area and performance to handcrafted designs. They are also portable across a wide range of silicon foundries and suitable for field programmable gate array and programmable logic data implementation. The approach described has also been extended to wavelet packet transforms.

On Vowels Segmentation and Identification Using Formant Transitions in Continuous Recitation of Quranic Arabic

This paper provides an analysis of cues to identify Arabic vowels. A new algorithm for vowel identification has been developed that uses formant frequencies. The algorithm extracts the formants of already segmented recitation audio files and recognizes the vowels on the basis of these extracted formants. The investigation has been done in context of recitation principles of Holy Quran which are commonly known as Tajweed rules. Primary objective of this work is to be able to identify zabar /a/, zair /e/ and pesh /u/ mistakes of the recitor during the recitation. Acoustic Analysis was performed on 150 samples of different recitors and a corpus comprising recitation of five experts was used to validate the results. The vowel identification system developed here has shown up to 90% average accuracy on continuous speech files comprising around 1000 vowels.

Design and implementation of the symmetrically extended 2-D Wavelet Transform

The inclusion of the Discrete Wavelet Transform in the JPEG-2000 standard has added impetus to the research of hardware architectures for the two-dimensional wavelet transform. In this paper, a VLSI architecture for performing the symmetrically extended two-dimensional transform is presented. This architecture conforms to the JPEG-2000 standard and is capable of near-optimal performance when dealing with the image boundaries. The architecture also achieves efficient processor utilization. Implementation results based on a Xilinx Virtex-2 FPGA device are included.

Finding a suitable wavelet for image compression applications

In this paper we assess the relative merits of various types of wavelet functions for use in a wide range of image compression scenarios. We have delineated different algorithmic criteria that can be used for wavelet evaluation. The assessment undertaken includes both algorithmic aspects (fidelity, perceptual quality) as well as suitability for real-time implementation in hardware. The results obtained indicate that of the wavelets studied the biorthogonal 9&7 taps wavelet is the most suitable from a compression perspective and that the Daubechies 8 taps gives best performance when assessed solely in terms of statistical measures.

A variable block size motion estimation algorithm for real-time H.264 video encoding

This paper presents an efficient variable block size motion estimation algorithm for use in real-time H.264 video encoder implementation. In this recursive motion estimation algorithm, results of variable block size modes and motion vectors previously obtained for neighboring macroblocks are used in determining the best mode and motion vectors for encoding the current macroblock. Considering only a limited number of well chosen candidates helps reduce the computational complexity drastically. An additional fine search stage to refine the initially selected motion vector enhances the motion estimator accuracy and SNR performance to a value close to that of full search algorithm. The proposed methods result in over 80% reduction in the encoding time over full search reference implementation and around 55% improvement in the encoding time over the fast motion estimation algorithm (FME) of the reference implementation. The average SNR and compression performance do not show significant difference from the reference implementation. Results based on a number of video sequences are presented to demonstrate the advantage of using the proposed motion estimation technique.

Sample rate conversion filter design for multi-standard software radios

In the context of sample rate conversion (SRC) filter design; this paper makes two key contributions. Firstly, a practical factorization algorithm has been formulated that iteratively assigns rate change factors to filtering stages of a proposed multi-standard SRC architecture. This multi-stage architecture is composed of multiplexed CIC filters, Farrow interpolators and half-band filters. Secondly, a novel frequency domain technique for joint CIC compensation filter and Farrow interpolator design has been proposed. Based on these contributions; a programmable and computationally efficient SRC filter design scheme with utilization in the digital IF stage of a software radio has been derived. The proposed ideas are explained using design examples and simulation results with parameters corresponding to various commercial wireless communications standards including GSM, IS-95, UMTS and the emerging WiMax IEEE 802.16 standard.

Efficient Sample Rate Conversion for Multi-Standard Software Defined Radios

This paper presents a modified structure based on cascaded integrator comb (CIC) filters and polynomial interpolation to perform arbitrary sample rate alterations. Incorporating CIC compensation filter within the polynomial interpolator has obviated programmable filter typically used in the process. It has also been shown that a maximum passband ripple of 0.5 dB is attainable with comparatively fewer computations. The ensuing design leads to an efficient realization both in terms of computational complexity and hardware utilization. This architecture is especially useful in the digital IF stage of emerging multi-standard wireless transceivers where fractional sample rate conversion with large relatively prime factors is required. Proposed solution has been tested by implementing it in a software radio simulation model supporting three commercial wireless communication standards, namely GSM, IS-95 and UMTS.

Continuous Arabic Speech Segmentation using FFT Spectrogram

This paper describes a phoneme segmentation algorithm that uses fast Fourier transform (FFT) spectrogram. The algorithm has been implemented and tested for utterances of continuous Arabic speech of 10 male speakers that contain almost 2346 phonemes in total. The recognition system determines the phoneme boundaries and identifies them as pauses, vowels and consonants. The system uses intensity and phoneme duration for separating pauses from consonants. Intensity in particular is used to detect two specific consonants (/r/, /hf) when they are not detected through the spectrographic information. Segmentation accuracy of 95.39% for the overall system has been achieved

Efficient Color Space Conversion using Custom Instruction in a RISC Processor

A new architecture for color space conversion in RGB to YCbCr domain has been proposed. The architecture exploits the similarity in bit-planes of a natural image to bring the algorithmic efficiency of distributed arithmetic (DA) approach close to that of a full multiplier design. Modifications have been carried out in DA to further reduce the computational complexity by a factor of two for most natural images. The color space conversion architecture has been incorporated in OR1200 open source IP processor core to provide custom instruction. Simulation and synthesis results on Xilinx FPGA are provided.