Shalini Yajnik

An adaptive power control and coding scheme for mobile radio systems

We propose a dynamic combined power control and forward error correction control (FEC) algorithm for mobile radio systems that can minimize the power consumed by wireless transmitters while increasing the number of simultaneous connections. This algorithm is distributed, where individual transmitter-receiver pairs determine the minimal power and FEC to satisfy specified quality-of-service (QOS) constraints. We present simulation results showing that this algorithm outperforms previous algorithms that use only power control.

Performance and reliability evaluation of passive replication schemes in application level fault tolerance

Process replication is provided as the central mechanism for application level software fault tolerance in SwiFT and DOORS. These technologies, implemented as reusable software modules, support cold and warm schemes of passive replication. The choice of a scheme for a particular application is based on its availability and performance requirements. In this paper we analyze the performability of a server software which may potentially use these technologies. We derive closed form formulae for availability throughput and probability of loss of a job. Six scenarios of loss are modeled and for each, these expressions are derived. The formulae can be used either of time or online to determine the optimal replication scheme.

Evaluation of an adaptive power and error control algorithm for wireless systems

We study the performance of a unified power control and forward error correction control algorithm for mobile radio systems that attempts to maximize system capacity and minimize transmitter power utilization while satisfying user defined quality of service constraints. The algorithm is distributed, with each individual transmitter-receiver pair determining its own operating point with respect to power and error control parameters. Simulation results from a cellular system with mobile users show that this unified algorithm outperforms the schemes that use power control alone.

Adaptive coding for packetized data in wireless networks

In the last decade the growth of wireless communication has been rapid. One critical issue in wireless systems is the efficient encoding of data to ensure correctness in the presence of noise and multipath fading. We propose some encoding schemes which span the FEC/ARQ spectrum and analyze them with respect to throughput and delay. We conclude with an adaptive algorithm for choosing the optimal encoding scheme based on observed error rates.

STL: a tool for on-line software update and rejuvenation

Summary form only given, as follows. A large number of tools and techniques have been developed in the past to achieve a 24/spl times/7 system availability (24 hours a day and 7 days a week) by reducing unscheduled system downtime due to failures. However, a highly available or fault-tolerant system may still have to be taken off-line for software and hardware updates, maintenance and rejuvenation. Therefore, the scheduled downtime for maintenance could become the major source of system unavailability. One big challenge in a highly available system is to keep the system running while it is undergoing software updates or bug fixes. In this paper, we describe a tool that can be used to perform an online update of software in a cluster environment. The tool consists of a protocol compiler (stgen) and a library (libst) for marshaling and unmarshaling data during a software update. The tool has the ability to transfer complex data structures between two processes even if the data definitions in the two processes are different. The data transfer format is machine-independent. Hence, the tool can transfer data across processes running on different machine types. The paper describes some real-life applications of the tool and presents performance measurements of the tool for these applications.

Analysis and randomized design of algorithm-based fault tolerant multiprocessor systems under an extended model

Reliability of compute-intensive applications can be improved by introducing fault tolerance into the system. Algorithm based fault tolerance (ABFT) is a low-cost scheme which provides the required fault tolerance to the system through system level encoding. In this paper, we propose randomized construction techniques, under an extended model, for the design of ABFT systems with the required fault tolerance capability. The model considers failures in the processors performing the checking operations.

Design of Algorithm-Based Fault Tolerant Systems with In-System Checks

To improve the reliability of computeintensive applications run on multiprocessor architec tures, fault tolerance is introduced into the system with on-line detection and location of faults. This can be achieved by a low-cost scheme, called Algorithm-based fault tolerance (ABFT), which encodes data at the system level and modifies the algorithm to operate on the encoded data. The resultant encoded output data is checked for correctness by some checks. In this pa per we present an extended model for representing and designing ABFT systems. The model takes into con sideration the processors evaluating the checks. We propose a design method which considers the proces sors computing the checks to be a part of the ABFT system and guarantees concurrent error detection even in the presence of faults in these processors, unlike most methods presented earlier.

Synthesis of fault tolerant architectures for molecular dynamics

Molecular dynamics (MD) simulations play an important role in the study of conformations and dynamics of proteins and nucleic acids. This paper suggests ways of mapping the molecular dynamics calculations to various types of parallel architectures, e.g. mesh array, linear array, such that the inherent redundancy involved in the simulation algorithm can be used to make the computation fault tolerant without much overhead.<<ETX>>

Graceful degradation in algorithm-based fault tolerant multiprocessor systems

Algorithm-based fault tolerance (ABFT) is a technique for improving the reliability of a multiprocessor system by providing concurrent error detection and fault location capability to it. In this paper, we propose the first integrated solution to the problem of fault detection, location and graceful degradation in ABFT systems. Unlike most previous methods, we use an extended model for representing ABFT systems, which allows faults to occur in check computing processors.<<ETX>>

Design and Analysis of Algorithm-Based Fault Tolerant Multiprocessor Systems

Algorithm-based fault tolerance (ABFT) is a cost-effective technique for improving the reliability of a multiprocessor system. It uses system-level codes to provide concurrent error detection and fault diagnosis capability to the system. This section gives an overview of the design and analysis techniques used in ABFT.1