Shan Weiwei

BIST design of power switch

It is becoming common to implement power switches in low power system-on-chip (SoC). However, the power switches are not tested for manufactory defects in most designs currently. In this letter, a novel built-in self test (BIST) solution for power switch is proposed. The proposed solution can test the power switch with complete test vectors and fewer test cycles. For m switches, it only takes m+3 cycles to complete the whole test operation. Besides, the test vectors are very simple, the test results are very easy to be identified, and the proposed BIST circuit can be scaled freely with the amount of switches. In addition, although headers are analyzed in detail in this letter, the results are equally applicable to footers.