Shaowen Song

A broadband integrated services network architecture based on DWDM

The broadband integrated service network (B-ISDN) had been considered as one of the leading network architectures of fiber to the home for delivering integrated services for a quite long period of time. However, with the development of the dense wavelength division multiplexing (DWDM) technology, large number of channels of lights with different wavelengths are used to transmit data within one single fiber. This increases the bandwidth capacity of a single fiber by tens or even hundreds of times. DWDM has been deployed for long-haul transmissions and will surely change the landscape of fiber-to-the-home network architecture and protocols. Utilizing the bandwidth capability of DWDM to deliver broadband integrated services to homes is an important area of research. This paper presents a virtual star network architecture based on the very high channel count DWDM (VHCC-DWDM) framework, which uses the wavelength channels within one fiber to link the users with the service providers or the edge routers of the Internet. The paper discusses the network architectural issues, which include the network topology, the very high channel count DWDM, the wideband-low-loss fiber for access networks, and the user premises. The paper starts with an overview of the DWDM based residential access networks which have been developed in the literature.

Parallel processing for boundary element computations on distributed systems

Abstract A parallel boundary integral algorithm for solving boundary value problems on distributed memory computer systems is presented in this paper. The paper focuses on parallelizations of the influence coefficients matrix generation and the solution of the resulting linear system, which are the two main parts of boundary integral formulations. The distributed parallel boundary integral algorithm presented in this paper generates a part of the influence coefficients matrix on each computation node of a multicomputer platform and stores that part in the local memory. The distributed influence coefficients matrix is then used in its partitioned form by the parallel linear system solver to obtain the solution. The matrix of coefficients is large, dense and nonsymmetric. Three parallel linear system solvers are presented. Among them, Algorithm-1 and Algorithm-2 are based on the conjugate-gradient-squared (CGS) method, Algorithm-3 is based on a direct method. It is found that distributed memory parallel algorithms are very much machine dependent. The performance of a parallel linear system solver depends not only on the method of solution but also on the multicomputer network topology, and its ratio of node computation speed to network data transfer bandwidth. By selecting the algorithm which fits the characteristics of a distributed computer system hardware one can achieve relative maximum performance. The performance characteristics of distributed linear system solvers are studied in order to select an optimum method for the available hardware at minimum development cost. The performance of sequential linear system solvers which have been extensively documented in the literature are not applicable to distributed memory systems. This paper presents results and discussions on the selection of simple robust algorithms, easily implemented on specific hardware topologies and provides information for extending the selected methods to different parallel machines. The results can also serve as a reference for parallel computer benchmarking.

An overview of metropolitan and enterprise networks - current and future

In this paper, we present an overview of two very crucial parts of todays network systems - the enterprise network and the metropolitan network. The current status of these two networks, the equipment available today, and the development trends are discussed in details. Metropolitan area networks (MANs) are public networks that are targeted to provide high-speed networking over metropolitan area distances. The metro area network is mostly based on SONET, SDH and wavelength division multiplexing (WDM) technologies at this time, but still far away from being fully developed. Since MANs are still in their initial state of development, we discuss the technologies and equipment that are currently available on the market such as use of resilient packet rings and Ethernet applications. Enterprise network is a multi-layered, cross-platform series of high-tech security network system with the objective of providing the greatest possible protection to the institution. After review of the current status of the enterprise network, we attempt to answer the questions related to the future development of the network

An implementation of a residential gateway controller for a fixed bandwidth-sharing multiservices residential access network

As access technologies evolve, multiple services residential gateways are providing more and more integrated services to customer premises equipment. However, shared residential bandwidth does not guarantee quality of service. The paper presents our design of a fixed bandwidth-sharing multiple services access network, which is based on SONET/SDH over DWDM technology. This design allocates fixed bandwidth to each access point to guarantee quality for high bandwidth demanding services. Since system stability and low cost of the residential gateway are crucial to subscribers, we mainly focus on single chip implementations. One of our implementations, an implementation of the fixed bandwidth-sharing multiservices protocol on the Altera 10KE series PLD, is presented. It demonstrates the integrated services of two 10BaseT Ethernet connections and two 64 Kbps digital phone channels.

Three new bachelors of photonics in Ontario

After the introduction in 2001 of community college programs at the Photonics Technician/Technologist levels, the need to cover the photonics educational space at the undergraduate level was addressed. In the last year, three very different new undergraduate degrees in photonics have started to develop in Ontario. These programs are presented in this paper. The Honours B.Sc. in Photonics at Wilfrid Laurier University (Waterloo) will develop a strong understanding of the theory and application of photonics, with practical hands-on exposure to optics, fibre optics, and lasers. This program benefits from the particularity that the department offering it combines both Physics and Computer Science. At McMaster University, the Engineering Physics program will provide students with a broad background in basic Engineering, Mathematics, Electronics, and Semiconductors, as well as an opportunity to pursue Photonics in greater depth and to have that fact recognized in the program designation. The Niagara and Algonquin College Bachelor of Applied Technology in Photonics program is co-op and joint between the two institutions. Emphasis is placed on the applied aspects of the field, with the more hands-on experimental learning taking precedence in the first years and the more advanced theoretical subjects following in the latter years.

An optical semiconductor photonic transistor design and simulations

This paper presents a wideband optical semiconductor Photonic Transistor (PT) and computer simulation results. The PT can be used to construct either N-valued digital photonic logic gates or binary Boolean logic gates. Digital photonic circuits can then be built using these logic gates. We used a buried stripe wave guide heterojunction microstructure for the PT. The objective of this paper is to report the results of computer simulations with different active region dimensions for the same design. Numerical experiments have shown that the same logic function can be achieved with different sizes of the PT, by setting the appropriate signal powers. However, smaller size designs have the advantage of higher speeds and low power consumptions.

Prototyping a residential gateway using Xilinx ISE

This paper presents a residential gateway (RG) prototyping process using Xilinx Integrated Software Environment (ISE) version 6.1i. The RG was designed for broadband residential multiservices based on a SONET over DWDM (dense wavelength division multiplexing) access network. The RG design was targeted for Xilinx Virtex II FPGA for prototyping purpose. The RG core design and the prototyping process using Xilinx ISE, including simulation and implementation, are discussed in this paper.

Multiprocessor parallel routing for the quality of service enabled Internet

This paper presents a parallel router and a packet switching mechanism by merging IPv6 and asynchronous transfer mode (ATM) as the protocol for the quality of service (QoS) enabled Internet. The hardware architecture of the parallel router consists of N-general-purpose computers each combined with a newly designed inter-node communication unit. This parallel architecture provides the necessary speed required in cell switching for real-time applications. The IPv6 packet and ATM cell co-switching mechanism implemented by the router controlling software preserves the connectionless future for non-real-time applications and provides the QoS for real-time applications, through merging the IPv6 and ATM protocols. The IPv6 packet and ATM cell co-routing/switch mechanism is developed for the current parallel router and is presented along with the parallel hardware architecture.

Switching issues in the all optical DWDM network

This paper provides an overview of dense wavelength division multiplexing (DWDM) networks, including the principles and the current technologies. A discussion on the DWDM switching/routing issues and the possible solutions is followed after the overview. An analysis on the system requirements for all optical DWDM integrated services networks is then presented.

A personal computer based residential gateway for ATM-based full service access networks

This paper presents a study on applying a PCI bus personal computer as a residential gateway (RG) in a full service access network (FSAN). Algorithms and design issues for the gateway operating system (GOS) are discussed. Analyses of the bandwidth capacity of a PCI bus personal computer based RG are also provided.