Shayan Srinivasa Garani
Indian Institute of Science
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Publication
Featured researches published by Shayan Srinivasa Garani.
international conference on artificial intelligence and soft computing | 2018
Amrutha Machireddy; Shayan Srinivasa Garani
Convolutional neural networks (CNN) are popularly used for applications in natural language processing, video analysis and image recognition. However, the max-pooling layer used in CNNs discards most of the data, which is a drawback in applications, such as, prediction of video frames. With this in mind, we propose an adaptive prediction and classification network (APCN) based on a data-dependent pooling architecture. We formulate a combined cost function for minimizing prediction and classification errors. During testing, we identify a new class in an unsupervised fashion. Simulation results over a synthetic data set show that the APCN algorithm is able to learn the spatio-temporal information to predict and classify the video frames, as well as, identify a new class during testing.
international conference on future energy systems | 2017
Tarun Khandelwal; Karan Rajwanshi; Priti Bharadwaj; Shayan Srinivasa Garani; Rajesh Sundaresan
This work deals with non-intrusive load monitoring using a single inexpensive device at the mains. We argue that very low sampling rates (of 1 Hz) may suffice. This enables significant compression and cheaper end-devices. There are challenges when operating at such low sampling rates, of course. To achieve good appliance inference performance we propose improved event detection, feature extraction, and inference algorithms. The inference algorithm exploits state transition constraints and proposes the use of a maximum likelihood sequence detection for improved performance.
international conference on communications | 2017
Nithin Raveendran; Priya J. Nadkarni; Shayan Srinivasa Garani; Bane Vasic
We introduce a stochastic resonance based decoding paradigm for quantum codes using an error correction circuit made of a combination of noisy and noiseless logic gates. The quantum error correction circuit is based on iterative syndrome decoding of quantum low-density parity check codes, and uses the positive effect of errors in gates to correct errors due to decoherence. We analyze how the proposed stochastic algorithm can escape from short cycle trapping sets present in the dual containing Calderbank, Shor and Steane (CSS) codes. Simulation results show improved performance of the stochastic algorithm over the deterministic decoder.
IEEE Journal on Selected Areas in Communications | 2016
Shayan Srinivasa Garani; Tong Zhang; Ravi H. Motwani; Haralampos Pozidis; Bane Vasic
The digital universe is doubling every two years and expected to reach an unwieldy 44 zettabytes into the next decade. To cope with the ever increasing need for storing, transmitting and retrieving huge amounts of data, cloud storage, data centers and other massively distributed storage networks have emerged. These rely on efficient memory technologies at the physical level for speed, reliability and energy efficiency.
Archive | 2012
Shayan Srinivasa Garani; Yiming Chen
Archive | 2012
Shayan Srinivasa Garani; Yiming Chen
Archive | 2010
Shayan Srinivasa Garani; Sivagnanam Parthasarathy
Archive | 2009
Shayan Srinivasa Garani
Archive | 2014
Sivagnanam Parthasarathy; Shayan Srinivasa Garani; Sudha Thipparthi
Archive | 2010
Mustafa N. Kaynak; Sivagnanam Parthasarathy; Stefano Valle; Shayan Srinivasa Garani