Sheng-Fu Tsai

Temperature-dependent characteristics of polysilicon and diffused resistors

The temperature-dependent characteristics of polysilicon and diffused resistors have been studied. By using 0.18-/spl mu/m CMOS technology, a cobalt salicide process is employed and silicide is formed at the ends of resistors. Based on a simple and useful model, some important parameters of resistors including bulk sheet resistance (R/sub bulk/) and interface resistance (R/sub interface/) are obtained at different temperature. For diffused resistors, the R/sub bulk/ and R/sub interface/ values increase and decrease with increase of temperature, respectively. Positive values of temperature coefficient of resistance (TCR) are observed. Furthermore, TCR values decrease with decreasing resistor size. For polysilicon resistors, the R/sub interface/ values decrease with increase of temperature. In addition, negative and positive TCR values of R/sub bulk/ are found in n/sup +/ and p/sup +/ polysilicon resistors, respectively. In conclusion, by comparing the studied diffused and polysilicon resistors, negative trends of TCR are observed when the resistor size decreases.

Influences of surface sulfur treatments on the temperature-dependent characteristics of HBTs

The temperature-dependent DC characteristics of InGaP-GaAs heterojunction bipolar transistors with and without sulfur treatment are systematically studied and demonstrated. Due to the use of sulfur passivation, the series resistance of base-emitter junction of studied device can be effectively reduced. In addition, the device with sulfur treatment can be operated under ultra low collector current regimes (I/sub C//spl les/10/sup -11/ A). Experimentally, a long-time sulfur treatment is not appropriate. In this work, the studied device with sulfur treatment for 15 min is a good choice. Furthermore, at measured temperature (298 K-398 K), the studied device with sulfur treatment can reduce collector-emitter offset voltage and the impact of emitter size effect. Moreover, as the temperature is increased, the device with sulfur treatment will exhibit higher DC current gain and more stable temperature-dependent performances. This will extend the application regimes of the studied device in low-power and communication systems.

Characteristics of a new camel-gate field effect transistor (CAMFET) with a composite channel structure

A new camel-gate field effect transistor (CAMFET) with a composite channel structure has been fabricated and demonstrated. Due to the n+-InGaP/p+-InGaP/GaAs camel gate and InGaAs/GaAs composite channel structures employed, good device performance is observed. Experimentally, at room temperature, a gate-drain breakdown voltage over 15 V, maximum transconductance gm,max of 111.5 mS mm?1, voltage gain AV of 93.4, unity current gain cut-off frequency fT of 16.2 GHz and maximum oscillation frequency unity fmax of 24.2 GHz are obtained simultaneously for a 1 ? 100 ?m2 device. The studied device also shows good properties in a higher temperature regime. Moreover, the studied device exhibits relatively negligible temperature-dependent characteristics over the operating temperature range from 300 to 420 K. Therefore, the studied device provides promise for high-temperature and high-performance microwave electronic applications.

Temperature-dependent dc characteristics of an InGaAs∕InGaAsP heterojunction bipolar transistor with an InGaAsP spacer and a composite-collector structure

The temperature-dependent dc characteristics of an interesting heterojunction bipolar transistor with an InGaAsP spacer and an InGaAs∕InGaAsP composite-collector structure are studied and demonstrated. By employing the intermediate band-gap In0.72Ga0.28As0.61P0.39 material at the emitter-base and base-collector heterojunction, the electron blocking effect is effectively eliminated. The studied device gives the promising dc performances including the small offset and saturation voltages without degrading the breakdown behaviors. The typical incremental current gain of 114 and the maximum dc current gain of 118 are obtained. It is worthwhile to note that the desired current amplification over 11 decades of the magnitude of collector current IC is obtained in the studied device. Moreover, the switching or hysteresis phenomenon usually observed in InP-based devices is not seen in the studied device.

A comprehensive study of polysilicon resistors for CMOS ULSI applications

Abstract The characteristics of polysilicon resistors for CMOS ULSI applications have been investigated. Based on the presented sub-quarter micron CMOS borderless contact, both n+ and p+ polysilicon resistors with Ti- and Co-silicide self-aligned process are used at the ends of each resistor. A simple and useful model is proposed to analyse and calculate some important parameters of polysilicon resistors including electrical delta W(ΔW), interface resistance Rinterface, and pure sheet resistance Rpure. Furthermore, the characteristics of voltage-coefficient resistor, temperature-coefficient resistor, and resistor mismatching are also studied. An interesting sine-wave voltage-dependent characteristic due to the strong relation to the Rinterface has been modelled in this paper. This approach can substantially help engineers in designing and fabricating the precise polysilicon resistors in sub-quarter micron CMOS ULSI technology.

A new and improved structure of polysilicon resistor for subquarter micrometer CMOS device applications

A new and improved structure of polysilicon resistor for subquarter micrometer CMOS device applications has been demonstrated and studied. A simple model is proposed to analyze its important parameters such as the voltage-dependent bulk sheet resistance, interface resistance, and voltage coefficient of resistance (VCR). An anomalous voltage-dependent characteristic of overall resistance is found to mainly result from the existence of interface resistance. The proposed structure of a polysilicon resistor with a larger effective width of interface region shows substantial suppression of the voltage-dependent resistance deviation caused by interface resistance. The reduction of the VCR value is also obtained for the new structure. Consequently, from experimental results, the proposed structure can be used in precise (lower VCR) polysilicon resistors.

Characteristics of an InP-InGaAs-InGaAsP HBT

The dc characteristics of an interesting heterojunction bipolar transistor with an InGaAs-InGaAsP composite-collector structure are studied and reported. Due to the insertion of an InGaAsP setback layer at the base-emitter heterojunction, the potential spikes as well as the electron blocking effect are suppressed significantly. In addition, the presence of an effective base-collector homojunction substantially reduces the current blocking effect. The studied device shows good dc performances including the small offset and saturation voltage without degrading the breakdown behavior. A typical dc current gain of 118 and the desired current amplification over 11 decades of the magnitude of collector current I/sub C/ are obtained.

Comparative study of double ion implant Ti–salicide and pre-amorphization implant Co–salicide for ultra-large-scale integration applications

We have investigated the interesting double ion implant (DII) Ti–salicide and pre-amorphization implant (PAI) Co–salicide techniques for ultra-large-scale integration (ULSI) applications. The DII technique is combined with germanium (or arsenic) PAI and Si ion-mixing processes. The sheet resistances both of n+ and p+ polysilicons are decreased when the DII Ti–salicide and PAI Co–salicide techniques are used. Moreover, the incomplete phase transformation of Ti–salicide is not observed in 0.2 μm wide polysilicon devices with the Ge DII process. Furthermore, the n+/p-well junction leakage current is reduced when the Si ion-mixing process is used. Experimentally, based on the studied DII Ti–salicide and PAI Co–salicide techniques, high-performance 0.2 μm CMOS devices have been successfully fabricated.

InP/InGaAs double heterojunction bipolar transistor (DHBT) with an emitter tunneling barrier and composite collector structure

The DC performances of a novel InP/InGaAs double-heterojunction bipolar transistor (DHBT) with the undoped tunneling barrier and composite collector structure are studied and demonstrated. Due to the mass filtering effect for holes, a thin InP tunneling barrier can be used to replace the wide-gap emitter. Experimentally, an extremely small offset voltage of 25 mV and breakdown voltage BV/sub CEO/ of 9.2 V are obtained. Furthermore, the abrupt junction and /spl delta/-doping structure can eliminate the carrier blocking effect effectively when electrons are transported across the base-collector heterojunction. Meanwhile, the DC current gain is almost independent of the perimeter-to-area ratio of the emitter due to the low surface recombination.

On the n+-GaAs/p+-InGaP/n--GaAs High-Barrier Camel-Like Gate Transistor for High-Breakdown, Low-Leakage and High-Temperature Operations

A new field-effect transistor using an n-GaAs/p-InGaP/n-GaAs high-barrier camel-like gate and GaAs/InGaAs heterostructure-channel has been fabricated successfully and demonstrated. Experimentally, an ultra high gate-drain breakdown voltage of 52 V and a high drain-source operation voltage over 20 V with low leakage currents are obtained for a 1 ×100 μm device. Furthermore, the studied device also shows high breakdown behaviors at high temperature environment and good microwave characteristics. Therefore, based on these good characteristics, the studied device is suitable for high-breakdown, low-leakage and high-temperature applications.