Shigeo Ogawa

Interface‐trap generation at ultrathin SiO2 (4–6 nm)‐Si interfaces during negative‐bias temperature aging

This article reports an investigation of the negative‐bias temperature instability in metal‐oxide‐silicon (MOS) systems with gate oxide thickness (Tox) in the range of 4.2–30 nm. The bias temperature aging was performed on p‐type samples with applied negative oxide fields (1.6–5.0 MV/cm) over a temperature range of 150–290 °C. The maximum aging time was 5000 h. The interface‐trap distribution was evaluated by the conductance technique. This time‐consuming method yields reliable results even in ultrathin oxides, if appropriate corrections are made. The interface‐trap generation and the concurrent fixed oxide charge can be expressed by simple empirical expressions. Their characteristic features are the inverse proportionality to oxide thickness (Tox) for the generated interface‐trap density (Nit) and no thickness dependence for the fixed charge generation. A general phenomenological model is proposed to explain these empirical expressions in terms of the diffusion‐reaction chemistry between hydrogenated tri...

Neutral electron trap generation in SiO2 by hot holes

Experimental evidence for neutral electron trap generation in SiO2 caused by injected holes is presented. The neutral electron traps are detected by Fowler–Nordheim (FN) tunneling electron injection after avalanche hole injection. The density of generated neutral traps increases with the number of injected holes, but does not saturate with that of the trapped holes. The centroid of generated neutral traps is found to be in the middle of the oxide. These results suggest that neutral traps are generated by the holes and not only by the recombination of electrons with trapped holes. The origin of neutral traps is considered to be associated with dipolar defects formed by SiO bond breaking under hole transport in the oxide.

Interface‐trap generation induced by hot‐hole injection at the Si‐SiO2 interface

The individual role of hot holes, hot electrons, and their recombination in interface‐trap generation at the Si‐SiO2 interface during hot‐carrier injection has been investigated with an emphasis on its oxide thickness dependence (7–30 nm). Hot holes are found to be able to generate interface traps and to be much more effective for interface‐trap generation at low‐level injections than both hot electrons and electron‐hole recombination. The experimental evidence of no thickness dependence of the hot‐hole‐induced interface‐trap generation suggests that this is an interfacial process occurring at the Si‐SiO2 interface.

A new hot-carrier induced degradation mode under low gate and drain bias stresses in N-channel MOSFETs

Abstract Experimental evidence is presented for an enhanced hot-carrier induced degradation mode in submicron n-channel MOSFETs. Its feature is that remarkable lifetime shortening occurs at a gate bias of near threshold voltage and at drain biases lower than 5 V, rather than at the gate bias of maximum substrate current condition. Significant interface trap generation without apparent hole trapping is found to be responsible for degradation enhancement under these bias conditions.