Shigeyoshi Otsuki

Dependence of self-heating effects on operation conditions and device structures for polycrystalline silicon TFTs

Self-heating, a degradation mechanism of n-channel poly-Si thin-film transistors (TFTs) due to bias stress, has been investigated. The aim of this work is to study this effect in depth to be able to propose a device structure designed to reduce it. The variation of the threshold voltage (V/sub t/) shift with the stress-pulsewidth is related to the temperature rise due to the self-heating effect that depends on the stress-pulsewidth. Electron trapping in the oxide caused by the bias stress is considered to be enhanced by the TFT temperature rise owing to the self-heating. We show that copper-film-based TFTs, which have a substrate made of an extremely thin glass layer and a copper film exhibit much reduced self-heating and thus a decrease of V/sub t/ shift caused by the bias stress. These observations are interpreted using numerical simulations to estimate the temperature rise in the poly-Si channel region due to Joule heating.

High-rate glass etching process for transferring polycrystalline silicon thin-film transistors to flexible substrates

We report on a process technology that makes possible the transfer of polycrystalline silicon thin-film transistor (poly-Si TFT) arrays from an original rigid glass substrate to another flexible plastic substrate. The transfer technology is characterized by its high-rate glass etching process, using a newly developed apparatus. After a description of the transfer sequence free from adhesive contamination, we present experimental observations for high-rate glass etching in hydrofluoric (HF) and hydrochloric (HCl) acid solution mixtures. The etching apparatus provides jets of the solution mixtures to the glass surface in order to achieve good circulation of the solutions in the bath, as well as to remove etch products effectively from the surface. We successfully achieved etch rates as high as 6 /spl mu/m/min with the etched surfaces almost as smooth as the original glass. In order to gain insight into the chemical mechanism of the etching, we developed a simplified kinetic etching model based on a Langmuir isotherm. The model and experimental etch-rate data are generally in good agreement, indicating that the basic modeling approach captures much of the essential chemistry for the high-rate glass etching. The transfer technology allows us to obtain TFT flexible substrates with good electrical characteristics and flexibility even after an annealing process at as high as 150/spl deg/C. These results demonstrate that the transfer technology is a promising candidate for achieving entirely new lightweight electronic devices such as flexible displays and radio frequency identification tags based on TFT flexible substrates.

Very High Rate and Uniform Glass Etching with HF/HCl Spray for Transferring Thin-Film Transistor Arrays to Flexible Substrates

We report on very high rate and uniform glass etching with HF/HCl spray for transferring thin-film transistor (TFT) arrays from a glass substrate to a flexible substrate. Using HF/HCl spray etching, we achieved both high etch rates of over 20 µm/min and satisfactory etch-rate uniformity over a 150 mm area with an approximately 5% variation. Using spray etching, we have successfully fabricated flexible TFT substrates that have satisfactory electrical characteristics.

Effect of Zinc Oxide Film Deposition Position on the Characteristics of Zinc Oxide Thin Film Transistors Fabricated by Low-Temperature Magnetron Sputtering

We report on the effect of zinc oxide (ZnO) film deposition position on the characteristics of ZnO thin-film transistors (TFTs) fabricated by magnetron sputtering with no intentional heating of the substrate. We evaluate the properties of ZnO (channel semiconductor) films deposited at various positions with respect to the target position. We show that the film deposition at a position off-centered from the target results in good TFT characteristics. This might be due to the fact that the off-centered deposition position is effective for suppressing the effect of energetic negative ions in the plasma.

Transfer Processes for Thermally Stable Large-Size TFT Flexible Substrates

We report on glass etching transfer processes to obtain thermally stable large-size TFT flexible substrates on plastic film bases. The transfer processes include high-pressure jet etching that allows us to achieve good etch-rate uniformity over the large area and the utilization of an adhesive having a low elastic modulus. From the experiments and simulations, we find that using an adhesive having a low elastic modulus is effective in reducing bend of the flexible substrate under thermal stresses. The simulations also predict that the reduction in the bend corresponds to the reduction in the principal stress of the adhesive, leading to the suppression of the film peeling off from the thinned glass. Using the transfer processes, we have successfully fabricated thermally stable TFT flexible substrates (300 mmtimes350 mm times200 mum) that have satisfactory electrical characteristics

Quasi-Static Capacitance–Voltage Characteristics of Polycrystalline Silicon Thin-Film Transistors

We have investigated the quasi-static capacitance–voltage (QSCV) characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs), focusing on how the integration time for the capacitance measurement affects the QSCV curves. We have found that the response time of the carriers in the OFF state of the TFTs can be estimated from the QSCV results. QSCV measurements with external illumination enable us to estimate the surface depletion capacitance of TFTs. We have also found that the QSCV characteristics vary with the channel length of TFTs, indicating that the channel length dependence must be taken into account when making a model of TFT capacitance in the OFF state.

Simulations for the effect of chamber geometry on oxygen plasma characteristics for very large plasma sources

Using an oxygen discharge model based on diffusion equations, we numerically investigate the effect of chamber geometry on plasma density profiles, especially for very large rectangular high-density plasma chambers. The calculation results show that uniformity of the ion and O-atom density profiles seriously deteriorates when the chamber length increases up to 2 m. We discuss the dependence of the plasma density profiles on the chamber geometry in terms of the relationship between particle generation in the volume and loss at the wall surface. The simulation results indicate that the surface loss at the top and bottom chamber walls dominates the loss at the side walls. The density profiles, therefore, vary, depending on the chamber length even at the same aspect ratio. The simulation results also predict that the uniformity of the density profiles could be significantly improved over the very large area if the plasma were properly confined by using magnetic multipole fields, along with choosing suitable wall materials that influence the particle loss at the surface