Shiliang Tu

A Multi-Channel MAC Protocol for Wireless Sensor Networks

In this paper, we propose a novel multi-channel medium access control protocol for wireless sensor networks. Our protocol can dynamically assign multiple channels to nodes, thereby significantly increasing network energy efficiency, network lifetime and data throughput as well. The protocol requires only one transceiver per node, but solves the multi-channel hidden terminal problem through distributed coordinator node. Finally we evaluate the performance of this protocol through simulations. The performance results show that protocol significantly increase network energy efficiency, network lifetime and data throughput and exhibits prominent ability to utilize multi-channel transceiver among neighboring nodes.

WITS: A Wireless Sensor Network for Intelligent Transportation System

Transportation information collection and communication plays a key role in intelligent transportation system (ITS). Unfortunately, most conventional ITSs can only detect the vehicle in a fixed position, and their communication cables and power cables elevate the cost of construction and maintenance. Because of the advantages of the wireless sensor network (WSN) such as low power consumption, wireless distribution, and flexibility without cable restrictions., the usage of WSN in ITSs is expected to be able to overcome the above difficulties. This paper proposes a WSN-based transportation information collection and communication system. Hardware and software WSN modules are designed and prototyped

Towards Garbage Collection Mechanism for RTSJ-Oriented Embedded Java Processor

Currently, Java has been gradually applied in embedded real-time area with the improvement by the Real-Time Specification for Java (RTSJ). Accordingly, a hardware Java execution engine for embedded real-time applications, JPOR-32 (32-bit Java Processor Optimized for RTSJ), is designed. Taking JPOR-32 for an example, this paper presents the garbage collection mechanism for RTSJ-oriented embedded processor in detail. JPOR-32 provides effective architectural support for garbage collection. And the object reference format of JPOR-32 provides supports for objects tracing and heap scanning. The support for write barrier of real-time concurrent GC is also performed. Moreover, JPOR-32 provides optimized instruction level support for garbage collection. In addition, different garbage collection algorithms are compared on the base of the resource-constrained feature and the real-time requirement of the processor, and the hybrid garbage collectors are suggested.

A Viable Localization Scheme for Dynamic Wireless Sensor Networks

In wireless sensor network (WSN), the sensor location is crucial to many applications. So far, most of existing localization schemes assume that sensor nodes are static. But we can also find the dynamic wireless sensor network (DWSN) have great application foreground in dynamic situation. In this paper, we analyze characteristics of the DWSN and reason that existing localization schemes are unsuitable for DWSN, then present a novel dynamic localization schemes (DSL) for DWSN, In additional, we prove that DSL have good performances compare with other existing localization schemes in DWSN

Predictable bytecode cache with prefetch mechanism for a java processor

A time predictable bytecode cache with prefetch mechanism is proposed. It lets the CPU execute 4-byte per 2.42 cycles averagely. This leaves lots of time for prefetching. For each basic block, the time of prefetching and bytecode consumption can be computed accurately. Thus, the cache miss can be figured out in advance. It makes WCET analysis possible. Furthermore, this approach can be used in the method cache proposed in JOP that is time predictable with the miss only occurs on invoke and return. It deducts the time delay on invoke and return without changing any other properties of the method cache.

Asynchronous Transfer of Control in the RTSJ-compliant Java Processor

Asynchronous Transfer of Control (ATC) is a crucial mechanism for real-time applications, and is currently provided in the Real-Time Specification for Java (RTSJ). This paper proposes a framework to implement ATC in the RTSJ-compliant Java processor based on the instruction optimization method proposed in our previous work [1]. Because most of the processing is done before bytecode execution in this method, the implementation using our framework is straightforward. Moreover, its Worst Case Execution Time (WCET) is more predictable.

Automatic Memory Management for Embedded Real-Time Java Processor Jpor-32

Abstract Currently, Java has been gradually applied in embedded real-time areas like robotics, control system, etc. owning to its advantages like robustness, security, etc. In order to improve the performance of Javas execution engine for embedded real-time applications, JPOR-32, an embedded real-time Java processor, is designed. Based on it, this paper presents the automatic memory management (AMM) mechanism for embedded real-time Java processor. JPOR-32 provides architectural support as well as instruction level support for AMM. Its preprocessing mechanism reduces the complexity of the implementation of AMM, enhances the run-time efficiency, and promotes predictability of the worst-case execution time. The system design of JPOR-32 makes AMM of class azea avoided, and the optimized design of instruction set provides effective support for space checking and garbage collection scheduling. This paper also proposes an object reference format which provides supports for objects tracing, heap scanning, synchr...

Java Processor Optimized for RTSJ

Due to the preeminent work of the real-time specification for Java (RTSJ), Java is increasingly expected to become the leading programming language in real-time systems. To provide a Java platform suitable for real-time applications, a Java processor which can execute Java bytecode is directly proposed in this paper. It provides efficient support in hardware for some mechanisms specified in the RTSJ and offers a simpler programming model through ameliorating the scoped memory of the RTSJ. The worst case execution time (WCET) of the bytecodes implemented in this processor is predictable by employing the optimization method proposed in our previous work, in which all the processing interfering predictability is handled before bytecode execution. Further advantage of this method is to make the implementation of the processor simpler and suited to a low-cost FPGA chip.

Implementing predictable scheduling in RTSJ-Based java processor

Due to the preeminent work of the RTSJ, Java is increasingly expected to become the leading programming language in embedded real-time systems. To provide an efficient real-time Java platform, a Real-Time Java Processor (HRTEJ) based on the RTSJ was designed. This Java Processor efficiently implements the scheduling mechanism proposed in the RTSJ, and offers a simpler programming model through meliorating the scoped memory. Special hardwares are provided in the processor to guarantee the Worst Case Execution Time (WCET) of scheduling. In this paper, the scheduling implementation of this Java Processor is discussed, and its WCET is analyzed as well.

Research of a Goal-Driven Architecture in Ubiquitous Environments

In ubiquitous environments, an application should adapt its behaviors in real time depending on its context and users needs that can be described by the notion of high-level goals. In this paper, goals are used to guide the automatic assembly of a context-aware application from service components on the fly. A lightweight architecture LCASOA based on OSGi (Open Services Gateway Initiative) is proposed to resolve goals, as well as support context acquisition, discovery and reasoning. It also provides a sophisticated service composition mechanism for the service-oriented architecture. A Context Pair Language and the production rule are used as semantic basis to model and express contextual information and goals. A prototype for telematics system is developed to demonstrate the schemas usefulness.