Shintaro Hashimoto

Speech synthesizer with function of developing melodies

A synthesizer is disclosed which has the function of generating synthesized human voices and melodies in the form of synthesized sounds. The speech synthesizer may be implemented with one or more LSI devices which include a central processor unit for receiving word codes or melody program codes and for controlling the synthesizer, a memory for storing the sequence of synthesis for each word and melody, a synthesized word generator for providing audible indications of the respective words in the form of a synthesized sound and a melody generator for providing melodies in the form of a synthesized sound. A decision circuit decides if word codes or melody programs are provided. The selected words are audibly delivered by fetching its associated sequence of synthesis from the memory and synthesizing those words through the synthesized word generator or the selected melodies are audibly delivered by fetching its associated sequence of synthesis from the memory and synthesizing the selected melodies through the melody generator.

One‐chip LSI speech synthesizer

There is disclosed a one-chip speech synthesizer capable of providing synthesized human voices through a new and effective concept of LSI architecture. The synthesizer may execute all of the steps necessary for processing of sample data and enhances the processing speed through a new memory architecture by constructing the one-word length of a control memory (control ROM) longer than the one-word length of a data memory (data ROM). The synthesizer reproduces audible synthesized sounds merely by an added amplifier outside the one-chip LSI semiconductor device without the need to provide a digital-to-analog converter. The LSI device may be used with an expandable external memory as an extension of the data memory (data ROM) whenever a large number of words are to be processed.

Playback operation circuit in synthetic‐speech calculator

A synthetic-speech calculator includes a calculating circuit inclusive of a plurality of memory locations to allow successive or chain calculations by some calculations equations and calculating numerical data, and voice synthesizer for providing pronunciation of selected calculating information. The calculator further comprises a first circuit for loading the some calculation equations and the calculating numerical data to the selected memory locations, a second circuit for indicating or pronouncing the some calculation equations and the calculating numerical data which have been utilized for the calculation and stored in the memory locations, and a third circuit for repeating the calculation by the some calculation equations and the calculating numerical data all stored in the memory locations.