Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Shiro Kikuchi.
electronic components and technology conference | 1990
Naoaki Yamanaka; Shiro Kikuchi; Taichi Kon; Takaaki Ohsaki
A high-speed multichip 32*32 space-division switching module for high-definition TV broadcasting and switching systems is described. This module employs a novel Si-bipolar SST (super self-aligned process technology) switching LSI and a multilayer substrate with a polyimide dielectric and a fine pattern of copper conductors. The substrate contains matrix-shaped thin-film resistors for terminated transmission and has a spiral via hole structure to increase fabrication reliability. The module has 50- Omega characteristic impedance transmission lines that have a small deviation of less than 2.5%. The multichip module can handle a signal speed of 1.8 Gb/s using 1:1 and 1:n connections. Performance results confirm that this module will be suitable for future B-ISDN (broadband integrated services digital network) communication systems.<<ETX>>
IEEE Journal on Selected Areas in Communications | 1996
Shiro Kikuchi; Naoaki Yamanaka
A broadband network architecture is proposed that integrates multimedia services, such as data, video, and telephony information, using 52-Mb/s based STM-paths at the user network interface (UNI). The user can access any new service via the STM-based access network via either synchronous transfer mode (STM) switching or asynchronous transfer mode (ATM) switching. STM circuit switching supports long duration, constant bandwidth data transfer services such as video and high-definition television (HDTV) distribution and will also be used for the crossconnect system. Circuit switching can provide transparent transmission during long connection periods. This paper also proposes an expandable time-division switch architecture, an expandable time-division switching LSI, and an expandable switching module for small to large size system applications. The proposed time-division switching LSI, module, and system handle 52-Mb/s bearer signals and have throughputs of 2.4 Gb/s, 10 Gb/s, and 40 Gb/s, respectively. The time-division switch realizes video distribution with 1:n connections. Finally, a local switching node that features an expandable 52-Mb/s time-division circuit switching network is shown for multimedia access networking.
IEEE Journal on Selected Areas in Communications | 1990
Naoaki Yamanaka; Shiro Kikuchi; Masao Suzuki; Yukiharu Yoshioka
An expandable space-division (SD) switch architecture and a bipolar circuit design for gigabit-per-second crosspoint-switch LSIs are described. An expandable 2-Gb/s 16*16 crosspoint switch LSI which employs a novel switch structure, a novel circuit design, and a super self-aligned process (SST-1A) is developed. A switching module and partial 1:n nonblock, full 1:1 nonblock switching network architecture are also presented. Using the LSI and the switching network architecture, an experimental 620-Mb/s network system is demonstrated. >
Archive | 1987
Hideki Kataoka; Tatsuro Takahashi; Shiro Kikuchi; Naoaki Yamanaka; Hajime Sakakibara; Miki Hirano
Archive | 1987
Naoaki Yamanaka; Shiro Kikuchi
Archive | 1986
Hideki Kataoka; Shiro Kikuchi; So Sakakibara; Tatsuro Takahashi; Naoaki Yamanaka
Archive | 1986
Shiro Kikuchi; Masao Suzuki; Naoaki Yamanaka
Archive | 1987
Yoshitaka Hirano; Hideki Kataoka; Tatsuro Takahashi; So Sakakibara; Shiro Kikuchi; Motoyuki Ishikawa; Akira Inaba; Arata Ando
Archive | 1987
Shiro Kikuchi; Hideki Kataoka
Archive | 1988
Shiro Kikuchi; Naoaki Yamanaka