Shromona Ghosh
University of California, Berkeley
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Publication
Featured researches published by Shromona Ghosh.
Formal Methods in System Design | 2017
Jyotirmoy V. Deshmukh; Alexandre Donzé; Shromona Ghosh; Xiaoqing Jin; Garvit Juniwal; Sanjit A. Seshia
Requirements of cyberphysical systems (CPS) can be rigorously specified using Signal Temporal Logic (STL). STL comes equipped with semantics that are able to quantify how robustly a given signal satisfies an STL property. In a setting where signal values over the entire time horizon of interest are available, efficient algorithms for offline computation of the robust satisfaction value have been proposed. Only a few methods exist for the online setting, i.e., where only a partial signal trace is available and rest of the signal becomes available in increments (such as in a real system or during numerical simulations). In this paper, we formalize the semantics for robust online monitoring of partial signals using the notion of robust satisfaction intervals (\(\mathtt {RoSI}\)s). We propose an efficient algorithm to compute the \(\mathtt {RoSI}\) and demonstrate its usage on two real-world case studies from the automotive domain and massively-online CPS education. As online algorithms permit early termination when the satisfaction or violation of a property is found, we show that savings in computationally expensive simulations far outweigh any overheads incurred by the online approach.
international conference on hybrid systems computation and control | 2016
Shromona Ghosh; Dorsa Sadigh; Pierluigi Nuzzo; Vasumathi Raman; Alexandre Donzé; Alberto L. Sangiovanni-Vincentelli; Shankar Sastry; Sanjit A. Seshia
We address the problem of diagnosing and repairing specifications for hybrid systems, formalized in signal temporal logic (STL). Our focus is on automatic synthesis of controllers from specifications using model predictive control. We build on recent approaches that reduce the controller synthesis problem to solving one or more mixed integer linear programs (MILPs), where infeasibility of an MILP usually indicates unrealizability of the controller synthesis problem. Given an infeasible STL synthesis problem, we present algorithms that provide feedback on the reasons for unrealizability, and suggestions for making it realizable. Our algorithms are sound and complete relative to the synthesis algorithm, i.e., they provide a diagnosis that makes the synthesis problem infeasible, and always terminate with a non-trivial specification that is feasible using the chosen synthesis method, when such a solution exists. We demonstrate the effectiveness of our approach on controller synthesis for various cyber-physical systems, including an autonomous driving application and an aircraft electric power system.
international joint conference on artificial intelligence | 2018
Tommaso Dreossi; Shromona Ghosh; Xiangyu Yue; Kurt Keutzer; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia
We present a novel framework for augmenting data sets for machine learning based on counterexamples. Counterexamples are misclassified examples that have important properties for retraining and improving the model. Key components of our framework include a counterexample generator, which produces data items that are misclassified by the model and error tables, a novel data structure that stores information pertaining to misclassifications. Error tables can be used to explain the models vulnerabilities and are used to efficiently generate counterexamples for augmentation. We show the efficacy of the proposed framework by comparing it to classical augmentation techniques on a case study of object detection in autonomous driving based on deep neural networks.
IFAC-PapersOnLine | 2018
Marcell Vazquez-Chanlatte; Shromona Ghosh; Vasumathi Raman; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia
Abstract Motivated by the synthesis of controllers from high-level temporal specifications, we present two algorithms to compute dominant strategies for continuous two-player zero-sum games based on the Counter-Example Guided Inductive Synthesis (CEGIS) paradigm. In CEGIS, we iteratively propose candidate dominant strategies and find counterexamples. For scalability, past work has constrained the number of counterexamples used to generate new candidates, which leads to oscillations and incompleteness, even in very simple examples. The first algorithm combines Satisfiability Modulo Theory (SMT) solving with optimization to efficiently implement CEGIS. The second abstracts previously refuted strategies, while maintaining a finite counterexample set. We characterize sufficient conditions for soundness and termination, and show that both algorithms are sound and terminate. Additionally, the second approach can be made complete to within an arbitrary factor. We conclude by comparing across different variants of CEGIS.
arXiv: Computer Vision and Pattern Recognition | 2017
Tommaso Dreossi; Shromona Ghosh; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia
arXiv: Programming Languages | 2018
Daniel J. Fremont; Xiangyu Yue; Tommaso Dreossi; Shromona Ghosh; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia
international conference on robotics and automation | 2018
Shromona Ghosh; Felix Berkenkamp; Gireeja Ranade; Shaz Qadeer; Ashish Kapoor
automated technology for verification and analysis | 2018
Sanjit A. Seshia; Ankush Desai; Tommaso Dreossi; Daniel J. Fremont; Shromona Ghosh; Edward Kim; Sumukh Shivakumar; Marcell Vazquez-Chanlatte; Xiangyu Yue
arXiv: Systems and Control | 2018
Somil Bansal; Shromona Ghosh; Alberto L. Sangiovanni-Vincentelli; Sanjit A. Seshia; Claire J. Tomlin
arXiv: Robotics | 2018
Ankush Desai; Shromona Ghosh; Sanjit A. Seshia; Natarajan Shankar; Ashish Tiwari