Shuhei Mitani

High performance SiC trench devices with ultra-low ron

We have developed SiC trench structure Schottoky diodes and SiC double-trench MOSFETs. We succeeded in improving device performance by the reduction of the electric field through the introduction of the aforementioned trench structures. The threshold voltage of the trench structure Schottky diode is 0.48V smaller than the planar. Also, the lowest on-resistance in SiC MOSFETs was achieved.

Investigation of unusual mobile ion effects in thermally grown SiO2 on 4H-SiC(0001) at high temperatures

Generation and elimination of mobile ions in thermally grown SiO2 on 4H-SiC(0001) were systematically investigated by electrical measurements of MOS capacitors. In contrast to a SiO2/Si system, intrinsic positive mobile ions were found to exist in as-oxidized SiO2/SiC structures, leading to significant instability of SiC-MOS devices. Post-oxidation annealing in Ar ambient mostly eliminates the mobile ions, but they are generated again by subsequent high-temperature hydrogen annealing despite the improved interface quality. The density of the mobile ions was estimated to be several 1012 cm−2. Possible physical origins of the mobile ions are discussed on the basis of the experimental findings.

Investigation of Surface and Interface Morphology of Thermally Grown SiO2 Dielectrics on 4H-SiC(0001) Substrates

Surface and interface morphology of thermal oxides grown on 4-off (0001) oriented 4H-SiC substrates by dry O2 oxidation was investigated using atomic force microscopy (AFM) and transmission electron microscopy (TEM). When step bunching was present on a starting wafer, oxide surface roughness was much larger than that of the starting 4H-SiC surface. This is attributed to the difference in oxidation rate between the terrace and the step face. A step-terrace structure on 4H-SiC(0001) was mostly preserved on the oxide surface, but pronounced oxidation occurred around the step bunching. Cross-sectional TEM observation showed that the SiO2/4H-SiC interface became smoother than the initial surface and the thickness of the SiO2 layer fluctuated. Such SiO2 thickness fluctuation may cause a local electric field concentration when a voltage was applied to the oxide, thus degrading the dielectric breakdown characteristics of 4H-SiC metal-oxide-semiconductor (MOS) devices.

Performance and reliability improvement in SiC power MOSFETs by implementing AlON high-k gate dielectrics

We have developed AlON high-k gate dielectric technology that can be easily implemented into both planar and trench SiC-based MOSFETs. On the basis of electrical characterization and numerical simulation, the thickness ratio of the AlON layer to the SiO2 interlayer and nitrogen content in AlON film were carefully optimized to enhance device performance and reliability.

Energy Band Structure of SiO2/4H-SiC Interfaces and its Modulation Induced by Intrinsic and Extrinsic Interface Charge Transfer

The energy band structure of SiO2/4H-SiC fabricated on (0001) Si- and (000-1) C-face substrates was investigated by means of synchrotron radiation x-ray photoelectron spectroscopy (SR-XPS). The band structure was found to be dependent on substrate orientation and oxide thickness due to both intrinsic and extrinsic effects that cause charge transfer at the SiO2/SiC interface. Our SR-XPS analysis revealed that the intrinsic conduction band offset of the SiO2/SiC for the C-face substrate is smaller than that for the Si-face. This means that, whereas C-face substrates exhibit high carrier mobility, a problem that is crucial to gate oxide reliability remains for SiC-based metal-oxide-semiconductor (MOS) devices owing to increased leakage current.

AlON/SiO2 Stacked Gate Dielectrics for 4H-SiC MIS Devices

We propose the use of an aluminum oxynitride (AlON) gate insulator for 4H-SiC MIS devices. Since direct deposition of AlON on 4H-SiC substrate generates a large amount of interface charge due to an interfacial reaction, a thick AlON layer was deposited on underlying thin SiO2 thermally grown in N2O ambient. To reduce the negative fixed charge density in the aluminum oxide (Al2O3) film, we used reactive sputtering of Al in an N2/O2 gas mixture. The fabricated MIS capacitor with AlON/SiO2 stacked gate dielectric shows no flat band voltage shift and negligible capacitance-voltage hysteresis (30 mV), indicating the dielectric is almost free from both fixed charges and electrical defects. Owing to the high dielectric constant of AlON (k=6.9), as compared to single N2O-SiO2 gate insulator, significant gate leakage reduction was achieved by AlON/SiO2 stacked gate dielectrics even at high-temperature, especially in a high electric field condition (>5 MV/cm).

Novel Approach for Improving Interface Quality of 4H-SiC MOS Devices with UV Irradiation and Subsequent Thermal Annealing

We report on the harmful impact of ultraviolet (UV) light irradiation on thermally grown SiO2/4H-SiC(0001) structures and its use in subsequent thermal annealing for improving electrical properties of SiC-MOS devices. As we previously reported [1], significant UV-induced damage, such as positive flatband voltage shift and hysteresis in capacitance-voltage curves as well as increased interface state density, was observed for SiC-MOS devices with thermally grown oxides. Interestingly, the subsequent annealing of damaged SiO2/SiC samples resulted in superior electrical properties to those for untreated (fresh) devices. These findings imply that UV irradiation of the SiO2/SiC structure is effective for eliciting pre-existing carbon-related defects and transforming them into a simple configuration that can be easily passivated by thermal treatment.

Direct Observation of Dielectric Breakdown Spot in Thermal Oxides on 4H-SiC(0001) Using Conductive Atomic Force Microscopy

The dielectric breakdown mechanism in 4H-SiC metal-oxide-semiconductor (MOS) devices was studied using conductive atomic force microscopy (C-AFM). We performed time-dependent dielectric breakdown (TDDB) measurements using a line scan mode of C-AFM, which can characterize nanoscale degradation of dielectrics. It was found that the Weibull slope () of time-to-breakdown (tBD) statistics in 7-nm-thick thermal oxides on SiC substrates was much larger for the C-AFM line scan than for the common constant voltage stress TDDB tests on MOS capacitors, suggesting the presence of some weak spots in the oxides. Superposition of simultaneously obtained C-AFM topographic and current map images of SiO2/SiC structure clearly demonstrated that most of breakdown spots were located at step bunching. These results indicate that preferential breakdown at step bunching due to local electric field concentration is the probable cause of poor gate oxide reliability of 4H-SiC MOS devices.

Improved Electrical Properties of SiC-MOS Interfaces by Thermal Oxidation of Plasma Nitrided 4H-SiC(0001) Surfaces

We propose a treatment of nitrogen radical irradiation to 4H-SiC surfaces for improving thermally grown SiO2/SiC interfaces. X-ray photoelectron spectroscopy (XPS) analyses revealed that a 1.7-nm-thick nitride film was formed by nitrogen radical exposure for 30 min and that Si-N bonds were retained after subsequent 10 min oxidation. It was also confirmed by secondary ion mass spectrometry (SIMS) that nitrogen atoms were piled up at the SiO2/SiC interface for the samples fabricated by thermal oxidation for 3 min with nitrogen plasma exposure. The metal-oxide-semiconductor (MOS) capacitors with a thin oxynitride layer formed by nitrogen radical exposure to the SiC surface and subsequent thermal oxidation exhibited excellent capacitance-voltage (C-V) characteristics. The interface state density (Dit) was significantly reduced by nitrogen radical exposure even at the shallow energy level near the conduction band edge. A minimum Dit value of 1.4 × 1011 cm-2eV-1 at Ec – E = 0.44 eV was achieved. Therefore, we can conclude that the treatment of nitrogen radical irradiation to the SiC surface prior to thermal oxidation is a promising method for improving SiC-MOS characteristics.

Improved Characteristics of 4H-SiC MISFET with AlON/Nitrided SiO2 Stacked Gate Dielectrics

We investigated the impact of a combination treatment of nitrogen plasma exposure and forming gas annealing (FGA) for a thermally grown SiO2 layer on channel electron mobility in 4H-SiC metal-insulator-semiconductor field-effect-transistors (MISFETs) with and without deposited aluminum oxynitride (AlON) overlayers. This treatment was effective for improving the interface properties of nitrided SiO2/SiC structures formed by thermal oxidation in NOx ambient as well as pure SiO2/SiC structures. A channel mobility enhancement was perfectly consistent with a reduction in interface state density depending on the process conditions of the combination treatment, and a peak mobility of 26.9 cm2/Vs was achieved for the MISFETs with the nitrided SiO2 single dielectric layer. Comparable channel mobility was obtained with a gate insulator consisting of the AlON stacked on a thin nitrided SiO2 interlayer, indicating that both the combination treatment and the AlON/SiO2 stacked dielectrics can be integrated into the SiC MISFET fabrication processes.