Shuichi Takada

Frequency multiplier capable of generating a multiple output without feedback control

Frequency multiplier using a voltage controlled delay circuit

Impedance trimming circuit

Delay locked loop having a mis-lock detecting circuit

CLOCK RECOVERY CIRCUIT AND DATA RECOVERY CIRCUIT

Frequency multiplying circuit having a greater multiplying ratio

A frequency multiplying circuit having a first stage with greater multiplying ratio than subsequent stages

Delay phase locked loop circuit

EQUALIZER TEST CIRCUIT AND EQUALIZER TEST SIGNAL GENERATION CIRCUIT

Voltage-controlled ring oscillator with level converting and amplitude control circuits