Shuji Kikuchi

Shuji Kikuchi; Yoshihiko Hayashi; Takashi Suga; Jun Saitou; Masahiko Kaneko; Takashi Matsumoto; Ryozou Yoshino

A 666 MHz VLSI test system with a dedicated memory test pattern generator was developed. A loose-timing data transfer scheme was employed for better integration of a shared-resource unit into the per-pin tester-architecture, Timing control resolution of 12.5 ps was achieved within a normal framework of a gate array LSI. A simple and low-cost timing calibration-technique was developed to offer accurate test timings. Parallel operation of the memory test pattern generators was used to realize a non-interrupted pattern generation at the maximum speed.

Shuji Kikuchi; Yoshihiko Hayashi; Takashi Matsumoto; Ryozou Yoshino; Ryuichi Takagi

The authors describe a 250-MHz, 2048-pin, shared-resource VLSI test system which has timing accuracy up to 300 ps and a parallel algorithmic pattern generation system for embedded memory testing. A timing generation system which provides an effective deskewing scheme in a shared-resource tester is proposed. Parallel pattern generation for high-speed memory testing is introduced, and a conversion strategy for parallel programs is discussed.<<ETX>>

Katsunori Hirano; Shuji Kikuchi; Yuji Sonoda; Wen Li; Tadanobu Toba; Takashi Kanesaka; Masayuki Takahashi

Ikuo Kawaguchi; Shuji Kikuchi; Chisato Hamabe

Ikuo Kawaguchi; Masaaki Inadachi; Shuji Kikuchi

Yasumaro Komiya; Shuji Kikuchi; Koichi Uesaka; Tadanobu Toba; Keiichi Yamamoto

Shuji Kikuchi; Tadanobu Toba; Katsunori Hirano; Yuji Sonoda; Takeshi Wada

Yuji Sonoda; Shuji Kikuchi; Katsunori Hirano; Ichiro Anjo; Mitsuaki Katagiri

Shuji Kikuchi; Hideki Osaka; Yuichi Sakurai; Tadanobu Toba; 英樹 大坂; 祐市 桜井; 修司 菊地; 忠信 鳥羽

Ikuo Kawaguchi; Shuji Kikuchi