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Featured researches published by Shuji Yamamura.


ieee international conference on high performance computing data and analytics | 2008

Performance prediction of large-scale parallell system and application using macro-level simulation

Ryutaro Susukita; Hisashige Ando; Mutsumi Aoyagi; Hiroaki Honda; Yuichi Inadomi; Koji Inoue; Shigeru Ishizuki; Yasunori Kimura; Hidemi Komatsu; Motoyoshi Kurokawa; Kazuaki Murakami; Hidetomo Shibamura; Shuji Yamamura; Yunqing Yu

To predict application performance on an HPC system is an important technology for designing the computing system and developing applications. However, accurate prediction is a challenge, particularly, in the case of a future coming system with higher performance. In this paper, we present a new method for predicting application performance on HPC systems. This method combines modeling of sequential performance on a single processor and macro-level simulations of applications for parallel performance on the entire system. In the simulation, the execution flow is traced but kernel computations are omitted for reducing the execution time. Validation on a real terascale system showed that the predicted and measured performance agreed within 10% to 20 %. We employed the method in designing a hypothetical petascale system of 32768 SIMD-extended processor cores. For predicting application performance on the petascale system, the macro-level simulation required several hours.


international symposium on microarchitecture | 2010

Sparc64 VIIIfx: A New-Generation Octocore Processor for Petascale Computing

Takumi Maruyama; Toshio Yoshida; Ryuji Kan; Iwao Yamazaki; Shuji Yamamura; Noriyuki Takahashi; Mikio Hondou; Hiroshi Okano

The Sparc64 VIIIfx eight-core processor, developed for use in petascale computing systems, runs at speeds of up to 2 GHz and achieves a peak performance of 128 gigaflops while consuming as little as 58 watts of power. Sparc64 VIIIfx realizes a six-fold improvement in performance per watt over previous generation Sparc64 processors.


Archive | 2006

Computer-readable recording medium with recorded performance analyzing program, performance analyzing method, and performance analyzing apparatus

Miyuki Ono; Shuji Yamamura; Akira Hirai; Kazuhiro Matsumoto; Kouichi Kumon


Archive | 2008

Cache memory having sector function

Shuji Yamamura; Mikio Hondou; Iwao Yamazaki; Toshio Yoshida


Archive | 2006

Program, apparatus, and method for analyzing processing activities of computer system

Shuji Yamamura; Kouichi Kumon; Miyuki Ono; Akira Hirai; Kazuhiro Matsumoto


Archive | 2006

Accounting apparatus and method for SMT processor

Shuji Yamamura; Kouichi Kumon


Archive | 2008

Prefetch processing apparatus, prefetch processing method, storage medium storing prefetch processing program

Shuji Yamamura; Takashi Aoki


Archive | 2012

ARITHMETIC PROCESSING DEVICE AND CONTROLLING METHOD THEREOF

Shuji Yamamura; Kuniki Morita


usenix annual technical conference | 2002

Speeding Up Kernel Scheduler by Reducing Cache Misses

Shuji Yamamura; Akira Hirai; Mitsuru Sato; Masao Yamamoto; Akira Naruse; Kouichi Kumon


Archive | 2006

Computer-readable recording medium storing system analysis program, and apparatus and method for system analysis

Shuji Yamamura; Kouichi Kumon; Miyuki Ono; Akira Hirai; Kazuhiro Matsumoto

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