Sin-Chong Park

Case Study on Transaction Level Modeling of NoC based IEEE 802.11n

In this paper, we design IEEE 802.11n WLAN receiver with the MIMO-OFDM technology based on network on chip platform. The transaction level analysis of IEEE 802.11n is performed and SW/HW partitioning is performed in terms of real-time requirement of system. Then SW and HW cores are mapped to NoC architecture. System performance of NoC is compared to bus architecture

A multi-processor NoC platform applied on the 802.11i TKIP cryptosystem

Since 2001, there have been a myriad of papers on systematic analysis of multi-processor system on chip (MPSoC) and network on chip (NoC). Nevertheless, we only have a few of their practical application. Till now, main interest of researchers has been to adapt NoC to the communication intensive multimedia system like H.263. However, this paper attempts to expand the domain of NoC platform to one of the wireless security algorithms (TKIP), because its inter-component transaction pattern shows considerable characteristic for NoC. This paper consists of the explanation on operational sequence of the algorithm in chosen architecture and the brief illustration of important composing NoC blocks (Network Interface, Router).

Analysis of throughput and efficient block size based polling scheme for IEEE 802.11e wireless LANs

In the recent draft of the 802.11e MAC, the hybrid coordinator (HC) gives transmission opportunity (TXOP) for a station to transmit burst frames in TXOP for improving throughput efficiency. In this paper, we express the expected throughput for the block ack policy in polled TXOP as a closed form function of the number of burst MSDUs, the number of fragmented MPDUs, the data payload length, the frame retry count, the wireless channel condition, and the selected PHY mode. Based on our simulation study and analysis, we show that the TXOP and proper ack policy can enhance system performance, and that there is a block ack efficient block size and frame length to transmit the burst frames for each PHY mode. Moreover, we also show that when the block ack mechanism is combined with link adaptation, it has better throughput performance. Based on the condition of the efficient block ack mechanism, we propose a block size based polling scheme.

Performance evaluation of various MIMO decoders for IEEE 802.11n WLAN system

In this paper, we present the performance evaluation of MIMO decoders for IEEE 802.11n high-speed WLAN system. The performance of Zero Forcing decoder, Minimum Mean Square Error decoder and Sphere decoder is evaluated by computer simulation in terms of packet error rate. The simulation results show that Sphere decoder has the best performance, Minimum Mean Square Error decoder has intermediate performance, and Zero Forcing decoder has the worst performance.

Implementation of the Modified State Mapping Viterbi Decoder with Radix-4

In this paper, the complexity of Viterbi architectures is compared in the point of the survivor sequence management. Moreover, the Viterbi decoder with constraint length (K=7), truncation length (T=5K), and code rate (R=l/3) is implemented. The Viterbi decoder uses the Radix-4 as the ACS method to obtain high throughput and low latency. The modified state mapping algorithm is also applied to achieve low latency as the survivor sequence management.

Sub-Optimal Soft Decision For DCM Demodulator of MB-OFDM UWB System

In the multiband-orthogonal frequency division multiplexing (MB-OFDM) based on the ultra wide-band (UWB) system, a new modulation scheme called dual carrier modulation (DCM) has been introduced in terms of the high data rate transmission. Since the conventional channel state information (ClS)-aided demapping is not directly used in DCM, a new solution of CSI-aided demapping is required. In this paper, a sub-optimal soft decision scheme for demapping using log likelihood ratio (LLR) and the property of jointly Gaussian pdf is proposed. The simulation results show that the proposed method achieves 3 dB better packet error rate (PER) performance than zero forcing hard decision decoding and 8 dB better than soft decision decoding in one case of the high data rate 320 Mbps.

Throughput analysis of IEEE 802.11e wireless LANs and efficient block ack mechanism

In the recent draft of the 802.11e MAC (IEEE, Aug. 1999), the hybrid coordinator (HC) gives transmission opportunity (TXOP) for a station to transmit burst frames in TXOP for improving throughput efficiency. In this paper, we express the expected throughput for the block ack policy in polled TXOP as a closed form function of the number of burst MSDUs, the number of fragmented MPDUs, the data payload length, the frame retry count, the wireless channel condition, and the selected PHY mode. Based on our simulation study and analysis, we show that the TXOP and proper ack policy can enhance system performance, and that there are the block ack efficient block size and frame length to transmit the burst frames for each PHY mode. Moreover, we also show that when the block ack mechanism is combined with link adaptation, it has better throughput performance.

Transaction Level Modeling for Hardware Architecture Exploration with IEEE 802.11n Receiver Example

This paper gives an overview of a transaction level modeling (TLM) design flow for the hardware architecture exploration with SystemC. TLM is widely used for hardware-software codesign, since the objective of TLM is the system exploration in the early stage of the design with fast but accurate simulation with abstracted transaction between modules in system. In this paper, we exploit the concept of TLM for the hardware architecture exploration. SystemC description methodology for TLM is described and the hardware architecture exploration of IEEE 802.11n PHY receiver is presented.

Design of Power-efficient Memory-based FFT Processor with New Memory Addressing Scheme

This paper presents a new memory-addressing scheme for the realization of power-efficient memory-based FFT processors. The scheme is based on the minimization of the coefficient access and reduction of switching activity by modifying the butterfly sequence. It also results in reducing hardware scale and shortening the critical path delay. Therefore, the power consumption in complex multiplier and memory is reduced

Backward compatible transmit diversity by antenna selection for IEEE 802.11a devices

802.11n MIMO system should be built upon 802.11a SISO system. This paper suggests simple way to implement 802.11a backward compatible transmitter diversity using multiple antennas in an 802.11a/802.11n device. This paper also presents the method of antennas selection and shows the improved results of simulation. In transmitter, the channel state information (CSI) can be measured by using preamble of ACK response or of pre-received packet at each antenna. With this CSI, selecting an antenna which has the largest channel gain for every subcarrier enables transmitter diversity implementation.