Souheil Bensmida

Concurrent Dual-Band Class-F Load Coupling Network for Applications at 1.7 and 2.14 GHz

Highly efficient multiband power amplifiers (PAs) are key elements for the development of future multistandard multiband communication terminals and cognitive radios. This paper reports the design of a multiharmonic dual-band Class-F power amplifier for applications at wireless communication frequencies based on a switchless multiharmonic multiband load coupling network topology. The proposed output network topology is able to precisely synthesize Class-F impedance conditions with up to three harmonics at two distinct nonharmonic frequencies without the need of switches or electronically tunable elements. The proposed topology was used to design a Class-F PA in hybrid technology for the frequency bands at 1.7 and 2.14 GHz. Optimum impedances for maximum efficiency of the used GaAs MESFET for the two bands were determined by multiharmonic load-pull measurements and synthesized by the proposed switchless dual-band Class-F network. With a dual-band input matching network, the fabricated PA achieves 44.0% and 61.3% drain efficiency for an output power of more than 32.8 dbm and 34.4 dbm at 1.7 and 2.14 GHz, respectively. To the best knowledge of the authors, this is the first concurrent multiharmonic dual-band PA reported in open literature.

Multichannel and Wideband Power Amplifier Design Methodology for 4G Communication Systems Based on Hybrid Class-J Operation

A methodology for the design of multichannel, wideband, highly efficient hybrid Class-J power amplifiers for fourth-generation (4G) communication transmitters is proposed. The design procedure is based on the automatic generation and evaluation of a vast number of output matching networks of the same topology but different dimensions, with respect to efficiency, output power, and linearity. The approach can find application in the management of the efficiency/linearity/bandwidth tradeoff in amplifier design. In this paper, two matching network architectures have been considered. One multistubbed network and a stepped-impedance microstrip line network. The approach has been validated through the design, simulation, and measurement of two power amplifiers realized using the aforementioned procedure. The first amplifier covers 1.6-2.2 GHz (31.6% fractional bandwidth) with 55%-68% drain efficiency at the 2-dB compression point and worst case adjacent channel power ratio (ACRP) and error vector magnitude (EVM) of - 21.8 dBc and 8.35%, respectively, over the bandwidth. The second covers 0.5-1.8 GHz (113% fractional bandwidth) with 50%-69% drain efficiency at the 2-dB compression point and worst case ACRP of - 27.5 dBc and EVM of 4.22%. Both amplifiers are based on a commercial, packaged 10-W GaN HEMT transistor.

A Digital Predistortion System with Extended Correction Bandwidth with Application to LTE- A Nonlinear Power Amplifiers

This article presents a bandwidth extended digital predistortion system suitable for LTE-advanced applications. The proposed predistortion system uses a two-box architecture based on the cascade of a memory polynomial followed by a memoryless predistortion function. The memoryless predistorter is identified offline and used to perform a coarse linearization which cancels out most of the static nonlinearity of the device under test allowing for a reduced observation bandwidth for the synthesis of the memory polynomial predistortion sub-function. The proposed predistorter was experimentally validated and its performance benchmarked against a predistorter having the same structure but identified using the conventional approach. The measurement results demonstrate that the proposed predistorter requires 30% less sampling speed for the analog to digital converter of the feedback path.

New Time-Domain Voltage and Current Waveform Measurement Setup for Power Amplifier Characterization and Optimization

This paper reports a novel voltage and current waveform measurement system suitable for large-signal transistor and power amplifier characterization and optimization. This technique is original in its use of a double six-port (SP) reflectometer as a homodyne vector network analyzer, which is calibrated in magnitude and phase by means of a reference multiharmonic signal generator, to measure the waveforms at the output terminal of the device. An active branch load-pull setup is used to control the source impedance at the fundamental frequency, and the load impedance at the fundamental, second, and third harmonic frequencies. The capability of the proposed SP reflectometer-based configuration is demonstrated experimentally, by measuring the voltage and current waveforms of a GaAs metal-semiconductor field-effect transistor that is biased in class AB and tuned for maximum efficiency. To assess the level of accuracy of the proposed method, the same waveforms were also measured using a microwave-transition-analyzer-based system. A comparison of the results shows that the proposed SP reflectometer setup obtains results accurate enough for power amplifier characterization with lower equipment cost.

Loop Enhanced Passive Source- and Load-Pull Technique for High Reflection Factor Synthesis

An original source- and load-pull topology based on a passive technique is presented in this paper. The proposed system consists of passive tuners and loop structures. The use of a passive loop structure in cascade with a passive tuner allows for synthesis of reflection coefficients in the order of 0.97 magnitudes at the device under tests access plane. The measurement and characterization results of a 1W GaAs MESFET device show an improvement of 0.9 dB in the gain and 6% in the power-added efficiency when the proposed impedance synthesis techniques are used.

Controlling Active Load–Pull in a Dual-Input Inverse Load Modulated Doherty Architecture

Mathematical analysis of Doherty amplifiers have assumed many simplifications. Most notably, the peaking amplifier does not contribute power into the load and the peaking stage has an observed impedance of infinity. This paper will show that these simplifications impair the performance of a single-input Doherty amplifier and that phase tuning for compensation is needed to improve the overall system performance. The dual-input Doherty amplifier is capable of overcoming the limitations of power-dependent phase imbalance and phase compensation lines at the input of the peaking stage; however, the characterization of such an architecture is not straightforward. A new measurement technique is proposed to measure dc current, dc voltage, and output power levels to allow unique characterization of a dual-input Doherty amplifier. Phase compensation lines at the input of the peaking amplifier will be shown to be not required, as long as correct offset lines are calculated for both the carrier and peaking stage and that the λ/4 transmission-line length is not necessarily required for active load-pull. Results of a dual-input inverse load modulated Doherty amplifier are presented where the peaking stage delivers 10 dB less of maximum output power than the carrier, while still maintaining Doherty behavior. The peaking stage can therefore be implemented with a smaller device than the carrier.

Overlapped segment piece-wise polynomial pre-distortion for the linearisation of power amplifiers in the presence of high PAPR OFDM signals

A modified piece-wise polynomial pre-distortion is proposed, investigated and compared against classic memoryless polynomial pre-distortion. The proposed enhanced piece-wise polynomial pre-distortion uses the overlap between segments to ensure continuity in the total pre-distortion function. The implementation of overlap allows the use of a simple error estimation algorithm to minimise hand over error. The classic and proposed piece-wise pre-distortion performances are assessed and compared for several sets of polynomial coefficients. The proposed method is shown to consistently outperform classical polynomial pre-distortion in terms of required coefficients and linearity improvement. The method is applied for the linearisation of an envelope tracking Class-J PA at 1.7GHz, under a 1.4MHz LTE signal with a 14.4dB PAPR.

The impact of baseband electrical memory effects on the dynamic transfer characteristics of microwave power transistors

The inter-modulation distortion products can vary both in terms of amplitude and asymmetry due to the effects of baseband and 2nd harmonic impedance. This paper presents an investigation into the relationship between the IMD asymmetries caused by baseband impedance variation and the looping or hysteresis that can sometimes appear in the dynamic transfer characteristics of microwave power devices when subjected to modulated excitation. The investigation is carried out using a 2W GaN HFET bare die device characterized at 2.1GHz, and using IF active load-pull to clarify the role of baseband impedance on observed hysteresis in the dynamic transfer characteristics. Analysis is performed using the envelope domain in order to more effectively reveal the DUTs sensitivity to impedance environments and specifically electrical baseband memory effects.

High efficiency digitally linearized GaN based power amplifier for 3G applications

In this paper, a high efficiency GaN based power amplifier is designed using multi-harmonics load pull measurements. A load matching network that independently controls the load impedance at the fundamental, second and third harmonic frequencies is used for straightforward implementation. The continuously driven single-ended deep class AB biased power amplifier achieves a peak power added efficiency of 68% at saturation. It is found that the designed power amplifier exhibit highly non linear characteristics with 7 dB gain compression at saturation. Digital predistortion based linearizer is used to improve the linearity performance of the power amplifier under a WCDMA excitation (PAPR=9.8 dB). At a 10 dB output power back-off, 21% power added efficiency was measured along with 53 dBc adjacent channel leakage ratio.

Linearity enhancement of GaN HEMTs under complex modulated excitations by optimizing the baseband impedance environment

This paper demonstrates how the linearity performance of a 10W GaN HEMT can be dramatically improved by actively engineering the baseband impedance environment around the device. An important refinement to existing active load-pull measurement capability is proposed that allows the precise and independent control of all significant baseband and RF components that result from the amplification of a complex 9-carrier multi-sine modulation. The synthesis of constant, modulation frequency independent negative baseband impedances, resulting in specific baseband voltage waveforms has delivered a 24dB improvement in ACPR compared to the classical baseband short case, even when the device is operating with RF components terminated into a non-optimal 50Ω RF environment. This linearization concept is further investigated through the broadband emulation of a class-J impedance environment around a single device. Using this enhanced system and a two-tone modulated excitation, optimum baseband loads are identified that result in a 18.5dB and 24dB improvement in IM3 and IM5 inter-modulation products respectively, again relative to the case of a traditional IF short circuit. The significance of this last observation is that unlike the 50Ω case, the optimum class-J IM3 and IM5 baseband impedances disperse, becoming reactive and moving away from the real axis.