Srdjan Jovanovski

Signal Adaptive Pipelined Hardware Design of Time-Varying Optimal Filter for Highly Nonstationary FM Signal Estimation

In this paper we develop a multiple-clock-cycle signal adaptive hardware design of an optimal nonstationary (time-varying) filtering system. The proposed design is based on the real-time results of time-frequency (TF) analysis and the estimation of instantaneous frequency (IF). It permits multiple detection of the local filter’s region of support (FRS) in the observed increment of time, resulting in the efficient filtering of multicomponent frequency modulated (FM) signals. The proposed design takes a variable number of clock (CLK) cycles–the only necessary ones regarding the highest quality of IF estimation–in different TF points within the execution. In this way it allows the implemented system to optimize the computational cost, as well as the time required for execution. Further, the proposed serial design optimizes critical design performances, related to the hardware complexity, making it a suitable system for real-time implementation on an integrated chip. Also, by applying the pipelining technique, it allows overlapping between different TF points within the execution, additionally improving the time required for time-varying filtering. The design has been verified by a field-programmable gate array (FPGA) circuit design, capable of performing filtering of nonstationary FM signals in real-time.

Signal Adaptive System for Space/Spatial-Frequency Analysis

This paper outlines the development of a multiple-clock-cycle implementation (MCI) of a signal adaptive two-dimensional (2D) system for space/spatial-frequency (S/SF) signal analysis. The design is based on a method for improved S/SF representation of the analyzed 2D signals, also proposed here. The proposed MCI design optimizes critical design performances related to hardware complexity, making it a suitable system for real time implementation on an integrated chip. Additionally, the design allows the implemented system to take a variable number of clock cycles (CLKs) (the only necessary ones regarding desirable—2D Wigner distribution-presentation of autoterms) in different frequency-frequency points during the execution. This ability represents a major advantage of the proposed design which helps to optimize the time required for execution and produce an improved, cross-terms-free S/SF signal representation. The design has been verified by a field-programmable gate array (FPGA) circuit design, capable of performing S/SF analysis of 2D signals in real time.

An efficient hardware design of an optimal nonstationary filtering system

The development of a multi-cycle hardware design of a time-varying (TV) filtering system, suitable for real-time implementation on an integrated chip is outlined in this work. Based on results of time-frequency (TF) analysis and the instantaneous frequency (IF) estimation, the proposed design enables multiple detection of the local filters region of support (FRS) in the observed time-instant, resulting in the efficient filtering of multicomponent FM signals. The proposed design optimizes critical design performances (such as hardware complexity, energy consumption and hardware cost), making it a suitable system for real-time implementation on a chip. The design has been verified by an FPGA (field-programmable gate array) circuit design.

Pipelined design of a system for highly nonstationary FM signals estimation

Pipelined signal adaptive hardware implementation of an optimal time-frequency (TF) filter has been designed. It is based on the real-time results of TF analysis and on the TF analysis-based instantaneous frequency (IF) estimation. The implemented pipelining technique allows the filter to overlap in execution unconditional steps performimg in neighboring TF instants and, therefore, to significantly enhance time performance. The improvement corresponding to the one clock cycle by a TF point is achieved, which means that the improvement by a TF point can reach even 50% in some TF points. The design is tested on multicomponent signals.).

Real-time implementation of the optimal two-dimensional filter for highly nonstationary frequency-modulated signal estimation

Real-time implementation of the optimal filter for highly nonstationary two-dimensional (2D) signal estimation is designed. It is based on the real-time results of 2D nonstationary signal analysis, on the correspondence of the filters region of support (FRS) to the signals local frequency (LF) and on the real-time LF estimation, implemented by the sliding matrix operation. Multiple FRS detection in the observed 2D signal point is provided by the proposed system, enabling very efficient real-time estimation of nonstationary monocomponent and multicomponent frequency-modulated (FM) noisy signals. The design is proven through the verification of the sliding matrix operation, that represents central part of the designed filter. As well, it is tested by estimation of the nonstationary monocomponent and multicomponent FM signals exposed to the high white noise.

Real-time design of a space/spatial-frequency optimal filter for highly nonstationary two-dimensional signal estimation

Two-dimensional (2D) optimal filter for highly nonstationary 2D signal estimation is developed. It is based on the real-time results of space/spatial-frequency (S/SF) analysis, on the correspondence of filters region of support (FRS) to the signals local frequency (LF) and on the real-time LF estimation algorithm, also proposed in this paper. The filter permits multiple FRS detection in the observed 2D signal point, enabling very efficient filtering (in real-time) of nonstationary monocomponent and multicomponent FM signals, highly concentrated in the S/SF space and exposed to the high white noise influence. The filter is verified on various mono- and multicomponent 2D test signals.

An efficient smart system for time-frequency analysis based on the cross-terms-free Wigner distribution signal representation

This paper outlines the development of an efficient multi-cycle, signal adaptive hardware design of a system for time-frequency (TF) signal analysis, suitable for real-time implementation on an integrated chip. The proposed design allows the implemented system to take variable number of clock (CLK) cycles (the only necessary ones regarding the high auto-terms quality) in different TF points within the execution. In this way, the proposed design optimizes execution time of the implemented system, producing a pure cross-terms-free Wigner distribution (WD) signal representation. Additionally, the proposed multi-cycle design optimizes both critical design performances, related to the complexity of the hardware, and the CLK cycle time. The design has been verified by a field-programmable gate array (FPGA) circuit design, suitable of performing processing of nonstationary signals in real-time.

Superior execution time hardware implementation of Wiener time-frequency filter

Multiple-clock-cycle and signal adaptive, but also completely pipelined hardware implementation of the optimal (Wiener) time-frequency filter is developed and verified. The implementation retains all desirable characteristics of the corresponding recently proposed signal adaptive solution with the optimized time and hardware requirements, but additionally improves the execution time — for a clock cycle per each time-frequency point performed within the estimation, resulting in the significant improvement of up to 50% in terms of points lying outside the instantaneous frequency of the estimated signal.

Completely pipelined implementation of optimal time-frequency filter for highly nonstationary FM signals estimation

Signal adaptive multiple-clock-cycle, but also completely pipelined hardware implementation of the optimal (Wiener) time-frequency filter is proposed in this paper. The verification of the proposed design is provided, as well as the most implementation details and the extensive comparative analysis. All significant characteristics of the corresponding recently proposed signal adaptive filtering solution (which shows the optimized time and hardware requirements) are retained by the developed implementation. Namely, the design proposed here enables the implemented filter to take variable (signal adaptive) number of clock cycles per a time-frequency point within the estimation, resulting in optimization of the execution time and in achieving high resolution, selectivity and the estimation quality. Further, as the essentially multiple-clock-cycle solution, it additionally optimizes hardware complexity. However, as the essential contribution, the completely pipelined implementation enables the proposed filter to additionally improve the time required for execution. The improvement of a clock cycle per each time-frequency point performed within the estimation is provided. This corresponds to the improvement of up to 50% in terms of points lying outside the instantaneous frequency of the estimated signal.

Local frequency estimation-based space/spatial-frequency optimal filter developed in the RTL design methodology versus the corresponding GPU-based implementations

Processing of nonstationary one-dimensional and two-dimensional (2D) signals are usually performed by using high numerically consuming time-frequency and space/spatial-frequency (S/SF) tools, respectively. Being numerically quite complex, these solutions require significant time for calculation and then are usually unsuitable for real-time analysis, but also their application is severely restricted in practice. Hardware implementations, when possible, can overcome these problems. Besides, numerical complexity greatly increases in the 2D signals case, so that demands for hardware implementations of systems for processing of these signals, including their filtering, are more emphasized. However, chip dimensions are significantly enlarged in this case, as well as the power consumption and cost, while the processing speed is seriously reduced. Therefore, having in mind technology limitations in hardware realizations, these systems usually cannot be implemented. To overcome these problems, the register transfer level (RTL) design methodology-based and signal adaptive development of the S/SF filter, suitable for realtime and on-a-chip implementation, has been designed in [1]. However, to significantly suppress time requirements of the space/spatial-frequency-based systems, the graphic processing units (GPUs)-based implementation of these systems can be considered as the possible solution. In this paper, the RTL design methodology-based solution from [1] is compared with the corresponding GPUs-based solutions.