Stefan Andrei

Systematic debugging of real-time systems based on incremental satisfiability counting

Real-time logic (RTL) is useful for the verification of a safety assertion with respect to the specification of a realtime system. Since the satisfiability problem for RTL is undecidable, the systematic debugging of a real-time system appears impossible. A first step toward this challenge was presented. With RTL, each prepositional formula corresponds to a verification condition. The number of truth assignments of a prepositional formula can help us determine the specific constraints which should be added or modified to get the expected solutions. This paper solves an even more challenging problem specified as future work, namely, the embedding and the integration of our debugger in autonomous systems which generate real-time control plans on-the-fly, since these specifications must meet timing constraints, but without human interaction. The idea is to consider in advance all the necessary information, such as the designers guidance. We have implemented a tool (called ADRTL) that is able to perform automatic debugging. The confidence of our approach is high as we have successfully evaluated ADRTL on several existing industrial-based applications.

About the Collatz conjecture

Abstract. This paper refers to the Collatz conjecture. The origin and the formalization of the Collatz problem are presented in the first section, named “Introduction”. In the second section, entitled “Properties of the Collatz function”, we treat mainly the bijectivity of the Collatz function. Using the obtained results, we construct a (set of) binary tree(s) which “simulate(s)”– in a way that will be specified – the computations of the values of the Collatz function. In the third section, we give an “efficient” algorithm for computing the number of iterations (recursive calls) of the Collatz function. A comparison between our algorithm and the standard one is also presented, the first being at least 2.25 “faster” (3.00 in medium). Finally, we describe a class of natural numbers for which the conjecture is true.

Faster Verification of RTL-Specified Systems via Decomposition and Constraint Extension

Embedded and real-time systems are increasingly common and complex, requiring formal specification and verification in order to guarantee their satisfaction of desirable safety and timing requirements. Real-time logic (RTL) has been used to capture both the specification of a real-time system and the desirable safety assertions with respect to this system specification. A verification procedure then determines whether the safety assertions hold with respect to the system specification. However, the satisfiability problem for RTL, as well as for other first-order logics, is undecidable. Consequently, efforts have been focused on identifying non-trivial classes of formulas sufficiently practical for describing industrial real-time systems for which the verification and debugging can be done via efficient heuristics. One such class of formulas is the so-called path RTL. The first contribution of this paper is to extend the existing path RTL class without sacrificing the time complexity of the traditional path RTL heuristic for verification. This implies that we can specify and verify real-time systems, which we were unable to do using the existing path RTL, in the extended path RTL. For real-time systems with large specifications, there is a lot of room for improvement in the algorithms used for verification and debugging. The second contribution of this paper is an efficient method to perform verification and debugging of real-time systems specifications using decomposition techniques. Our idea is to decompose the constraint graph, used in existing approaches, into independent subgraphs so that it is no longer necessary to analyze the entire specification at once, but rather its individual and smaller components. We have implemented this method in the Java-based DEVA-RTL tool and tested it on several industrial real-time systems

Calculating Polynomial Runtime Properties

Affine size-change analysis has been used for termination analysis of eager functional programming languages. The same style of analysis is also capable of compactly recording and calculating other properties of programs, including their runtime, maximum stack depth, and (relative) path time costs. In this paper we show how precise (not just big- \(\mathcal{O}\)) polynomial bounds on such costs may be calculated on programs, by a characterization as a problem in quantifier elimination. The technique is decidable, and complete for a class of size-change terminating programs with limited-degree polynomial costs. An extension to the technique allows the calculation of some classes of exponential-cost programs. We demonstrate the new technique by recording the calculation in numbers-of-function (or procedure) calls for a simple functional definition language, but it can also be applied to imperative languages. The technique is automated within the reduce computer algebra system.

An Efficient Scheduling Algorithm for the Multiprocessor Platform

Given a task set T, determining the number of processors leading to a feasible schedule for T is an important problem in the real-time embedded systems community. For periodic and independent task sets, the utilization rate represents a lower bound on the number of processors. A multiprocessor platform with fewer processors than the utilization rate of a given task set does not have a feasible schedule. To the best of our knowledge, there is no estimation on the lower bound of the number of processors for a single-instance task set. The contribution of this paper is two-fold. Firstly, given a single-instance, non-preemptive and independent task set, we provide a lower bound on the number of processors such that there exists no feasible schedules on a multiprocessor platform with fewer processors than this lower bound. Secondly, we provide an efficient algorithm that finds a feasible schedule of a single-instance non-preemptive and independent task set on a multiprocessor platform having the number of processors equal to the lower bound.

Verifying Linear Real-Time Logic Specifications

Formal specification and verification are critical to the development of safe real-time and embedded systems, which have become increasingly complex. Real-time logic (RTL) has been used to describe the specification and safety assertion of real-time systems. However, the satisfiability problem for RTL, as well as other first-order logics, is undecidable. There exist already non-trivial fragments of RTL, like path RTL and extended path RTL, for which the verification can be done efficiently. The key idea used by these RTL fragments was the so-called constraint graph. The constraint graph can express dependencies between two events, but cannot describe dependencies between three or more events. This paper presents a larger class than existing fragments of RTL for which the verification problem can also be solved efficiently. Our new class is called linear real-time logic (LRTL) and includes the existing decidable RTL fragments like path RTL and extended path RTL. The LRTL class is able to express any linear timing constraint with an arbitrary number of events variables (e.g., between three or more events). The main ingredient of the LRTL class is the use of matrices instead of the constraint graph, as a more powerful data structure capable of performing the conversion from RTL to a prepositional formula. The unsatisfiability of the prepositional formula will ensure the safety and feasibility of the given real-time system. Experimental results show that the execution times for LRTL are better than the systems expressed in extended path RTL, and comparable with those expressed in path RTL.

Automatic debugging of real-time systems based on incremental satisfiability counting

Real-time logic (RTL) is useful for the verification of a safety assertion with respect to the specification of a realtime system. Since the satisfiability problem for RTL is undecidable, the systematic debugging of a real-time system appears impossible. A first step toward this challenge was presented. With RTL, each prepositional formula corresponds to a verification condition. The number of truth assignments of a prepositional formula can help us determine the specific constraints which should be added or modified to get the expected solutions. This paper solves an even more challenging problem specified as future work, namely, the embedding and the integration of our debugger in autonomous systems which generate real-time control plans on-the-fly, since these specifications must meet timing constraints, but without human interaction. The idea is to consider in advance all the necessary information, such as the designers guidance. We have implemented a tool (called ADRTL) that is able to perform automatic debugging. The confidence of our approach is high as we have successfully evaluated ADRTL on several existing industrial-based applications.

Self-embedded context-free grammars with regular counterparts

Abstract.In general, it is undecidable if an arbitrary context-free grammar has a regular solution. Past work has focused on special cases, such as one-letter grammars, non self-embedded grammars and the finite-language grammars, for which regular counterparts have been proven to exist. However, little is known about grammars with the self-embedded property. Using systems of equations, we highlight a number of subclasses of grammars, with self-embeddedness terms, such as

Utilizing semantic caching in ubiquitous environment

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An Improved Upper-Bound Algorithm for Non-preemptive Task Scheduling

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