Stefan Lauxtermann

Teledyne Imaging Sensors: silicon CMOS imaging technologies for x-ray, UV, visible, and near infrared

Teledyne Imaging Sensors develops and produces high performance silicon-based CMOS image sensors, with associated electronics and packaging for astronomy and civil space. Teledynes silicon detector sensors use two technologies: monolithic CMOS, and silicon PIN hybrid CMOS. Teledynes monolithic CMOS sensors are large (up to 59 million pixels), low noise (2.8 e- readout noise demonstrated, 1-2 e- noise in development), low dark current (<10 pA/cm2 at 295K) and can provide in-pixel snapshot shuttering with >103 extinction and microsecond time resolution. The QE limitation of frontside-illuminated CMOS is being addressed with specialized microlenses and backside illumination. A monolithic CMOS imager is under development for laser guide star wavefront sensing. Teledynes hybrid silicon PIN CMOS sensors, called HyViSITM, provide high QE for the x-ray through near IR spectral range and large arrays (2K×2K, 4K×4K) are being produced with >99.9% operability. HyViSI dark current is 5-10 nA/cm2 (298K), and further reduction is expected from ongoing development. HyViSI presently achieves <10 e- readout noise, and new high speed HyViSI arrays being produced in 2008 should achieve <4 e- readout noise at 900 Hz frame rate. A Teledyne 640×480 pixel HyViSI array is operating in the Mars Reconnaissance Orbiter, a 1K×1K HyViSI array will be launched in 2008 in the Orbiting Carbon Observatory, and HyViSI arrays are under test at several astronomical observatories. The advantages of CMOS in comparison to CCD include programmable readout modes, faster readout, lower power, radiation hardness, and the ability to put specialized processing within each pixel. We present one example of in-pixel processing: event driven readout that is optimal for lightning detection and x-ray imaging.

Megapixel CMOS imager with charge binning

An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micrometers CMOS technology. For operation under poor lighting conditions, the change of sub-regions of 2 by 2 respectively 4 by 4 pixels can be summed, yielding a corresponding sensitivity enhancement. In that way the maximum resolution of 1024 by 1024 can be reduced to 512 by 512 or 256 by 256. Based on a charge skimming mechanism, the required circuitry can be implemented in any logic CMOS technology without process modifications. Output through 1, 2 or 4 analog channels clocked at a pixel at up to 40 MHz each allows a frame rate up to 160 frames/sec at an overall power dissipation of 70 mW.

Low-power digital image sensor for still-picture image acquisition

This article presents the design and realization of a CMOS digital image sensor optimized for button-battery powered applications. First, a pixel with local analog memory was designed, allowing efficient sensor global shutter operation. The exposure time becomes independent on the readout speed and a lower readout frequency can be used without causing image distortion. Second, a multi-path readout architecture was developed, allowing an efficient use of the power consumption in sub-sampling modes. These techniques were integrated in a 0.5 um CMOS digital image senor with a resolution of 648 by 648 pixels. The peak supply current is 7 mA for a readout frequency of 4 Mpixel/s at Vdd equals 3V. Die size is 55 mm2 and overall SNR is 55 dB. The global shutter performance was demonstrated by acquiring pictures of fast moving objects without observing any distortion, even at a low readout frequency of 4 MHz.

A monolithic 640 × 512 CMOS imager with high-NIR sensitivity

In this paper we present first results from a backside illuminated CMOS image sensor that we fabricated on high resistivity silicon. Compared to conventional CMOS imagers, a thicker photosensitive membrane can be depleted when using silicon with low background doping concentration while maintaining low dark current and good MTF performance. The benefits of such a fully depleted silicon sensor are high quantum efficiency over a wide spectral range and a fast photo detector response. Combining these characteristics with the circuit complexity and manufacturing maturity available from a modern, mixed signal CMOS technology leads to a new type of sensor, with an unprecedented performance spectrum in a monolithic device. Our fully depleted, backside illuminated CMOS sensor was designed to operate at integration times down to 100nsec and frame rates up to 1000Hz. Noise in Integrate While Read (IWR) snapshot shutter operation for these conditions was simulated to be below 10e- at room temperature. 2×2 binning with a 4× increase in sensitivity and a maximum frame rate of 4000 Hz is supported. For application in hyperspectral imaging systems the full well capacity in each row can individually be programmed between 10ke-, 60ke- and 500ke-. On test structures we measured a room temperature dark current of 360pA/cm2 at a reverse bias of 3.3V. A peak quantum efficiency of 80% was measured with a single layer AR coating on the backside. Test images captured with the 50μm thick VGA imager between 30Hz and 90Hz frame rate show a strong response at NIR wavelengths.

MEMS-based tunable filters for compact IR spectral imaging

Arrays of independently tunable MEMS Fabry-Perot filters have been developed that enable spectral tuning over the range of 11 - 8 microns with a filter bandwidth of ~ 120 nm. Actuation is provided using a MEMS driver IC that is hybridized to the MEMS chip. Combining the filter array with an IR FPA enables spatially-resolved spectral tuning in a compact architecture. Tunable spectral response data from the first integrated tunable filter / FPA device are presented.

High-sensitivity high-dynamic digital CMOS imager

CMOS image sensors offer over the standard and ubiquitous charge-coupled devices several advantages, in terms of power consumption, miniaturization, on-chip integration of analog- to-digital converters and signal processing for dedicated functionality. Due to the typically higher readout noise of CMOS cameras compared to CCD cameras applications demanding ultimate sensitivity were so far not accessible to CMOS cameras. This paper present an analysis of major noise sources, concepts to reduce them, and results obtained ona single chip digital camera with a QCIF resolution of 144 by 176 pixels and a dynamic range in excess of 120 dB.

Miniaturized Low-power Motion Detection Based on Optical Speckle Patterns

We present a miniaturized speckle movement detection system with a potential for low cost applications. As a light source, a VCSEL (Vertical Cavity Surface Emitting Laser) was used, emitting coherent light at a wavelenth of 760. After the light is scattered from the surface, the speckle pattern is imaged onto a sensor. As imaging optics, a commercially available refractive microlens array is used. The sensor is a custom design, CMOS photo ASIC (Application Specific Integrated Circuit) with a power consumption below 10 mW. The system generates output signals that indicate movement in 2 dimensions. An average resolution > 1000 dpi could be achieved at speeds up to 20 cm/sec.